I am not using the memory controller on the PK70FN1M0VMJ12, is there any special considerations to take into account with the setup of the pins related to the memory controller? i.e. DDR_VDD, DDR_VSS, DDR_A0..A14, DDRDQ
These are the only considerations:
1) Disabling DDR_DQx signals
2) Driving DDR_VSS, DDR_VSS and DDR_Ax pins low by connecting them to gnd
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