Bernd Mielke

slow /TA for MCF5234

Discussion created by Bernd Mielke on Jun 18, 2007
Latest reply on Jun 19, 2007 by Martin Latal
I have slow component which should be hooked directly to the memory interface. Is there a limit how long the processor waits for a TA if external termination is selected. I  would expect that everything up to 15 bus clock cycles is OK but what happens after this. For instance the external bus is correctly defined only after 250ns  while with 150MHz processor clock rate -> 75 MHz bus clock rate ->15 cycles expire after 200ns. A pointer where to read would be appreciated as I did not find the information.