Rick Soza

iMX51 I2C bus clock stops and slave is stuck in mid-transmission.

Discussion created by Rick Soza on Dec 1, 2011

A common I2C bus error is slave devices that have ended up in a state where Data (the data line) is low. Typically a master performs error recovery by clocking the Clock line until the Data line is high and then issuing a Start followed by a Stop.

Further explination of the problem is described at:

http://www.analog.com/static/imported-files/application_notes/54305147357414AN686_0.pdf

 

Does anyone have a Linux driver patch to perform the bus recovery by toggling the SCL line until SDA line is released again?

 

Thanks,

Rick S

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