Jim Pantera

overflow irq with TPM0 in Input Capture Mode

Discussion created by Jim Pantera on Aug 16, 2006
Latest reply on Aug 17, 2006 by David Payne
reference mc9s08rd32dwe

if the following control registers are set:
TPM1C0SC=x10010xx
x, chan0 irq=enabled, input capture=enabled, edge = falling, x, x
and
TPM1C0SC=X1001000
x, overflow irq=enabled, pwm=off, clock=bus clock, prescale=1

if the ptd6/tpm0 is always high (a falling edge never occures)



will there be interrupts due to the overflow = enabled??????


thanks again

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