Hi Wind
I use the NE64 with 100M LAN, where external memory is not possible. When I started with the NE64 it was using the GNU compiler which is not very efficient when paging is involved and so I decided to avoid it - this is how:
1. If you leave the PPAGE as it is after reset, you can address 0x4000...0xffff continuously (48k) which gives maximum efficiency.
2. The 16k 0x3d page (0x3d-8000..bfff) is then used as a file system. I down load web sides via FTP to this block with interface read and write routines which get and put data to the page.
I find this works well because when doing embedded IP applications a file system is really needed and 16k is a suitable size for about 5 controle web pages or for saving some recorded data and such. The code remains optimally efficient because there are no 'trampoline' functions.
Of course this limits the code size to 48k and there is 16k less than would otherwise be available (assuming no file system, if this makes sense). However the overhead for the trampoline stuff improves the figure somewhat. Then the compiler is also not to be ignored. If I take a 64k sized code compiled with the GNU compiler and compile it with IAR (I believe Codewarrior figures are similar) the code becomes about 40k in size and so fits after all.
If you have code which is larger that 48k then of course this will not work. Then paging will help - in which case I have a solution to access the file system in SPI EEPROM. If the code is larger that 64k then external memory will be necessary - which I avoid (first I don't want to sacrifice 100M LAN and secondly I use the 80 pin device with no ext. bus since it is rather smaller).
When bigger codes are involved I move to other devices like the Coldfire MCF5223x (although it is not yet really available - but it is a Freescale forum and I don't like to mention AxxxL). Interestingly, these Coldfire devices are more or less pin-out compatible to the NE64 and will not be much more expensive if the first indications are correct. Then there are also no paging difficulties to be faced...
Regards
Mark Butcher
www.mjbc.ch
if
initrg = 0x30;
initrm = 0x00;
initee = 0x39;
register address will be $3000 to $33ff (if 1 K register)
RAM address will be $0000 to $1FFF ( consider 8 K RAM)
EEPROM address will be $3800 to $3FFF ( consider 2K EEPROM)
the register,RAM and EEPROM are mapping to the MCU memory address : $0000 to $ 3FFF. This address range ($0000 to $3FFF) is different with page 3C ( block relative address $0000 to $3FFF). Thus I still have 64K flash.
Mark,
why didn't you put your ftp files in page 3C? any reason? or you just happen to choose page 3D to store your ftp file. ?
if now
initrg = $0x00 ( 2 K, REG_SW0=1)
initrm = $0x18 (16K, ram_sw2=1 ram_sw1=1 ram_sw0=1)
intee = $0x09 (4k, eep_sw1= 1 eep_sw0=0)
MCU AddressRange PPAGE Block Relative Address1
$4000-$7FFF Unpaged $8000-$BFFF
(16K) $3E
$8000-$BFFF $3C $0000-$3FFF
(16K) $3D $4000-$7FFF
$3E $8000-$BFFF
$3F $C000-$FFFF
$C000-$FFFF Unpaged $C000-$FFFF
(16K) ($3F)
my reference: EB386.pdf
regards
hi mark,
thanks. I understand now.
my mistake, the MEMSIZ0 is a read only register.
regards
Mark is correct. The newly introduced ColdFire MCF5223x Family creates an upgrade patch from the MC9S12NE64 which is pin similar (BDM interface is different, plus you have full UARTs accessible).
Plus, you have a linear addressing space (no paging necessary) and up to 256K internal flash. See thread below for more information:
http://forums.freescale.com/freescale/board/message?board.id=CFCOMM&message.id=55