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calculating proper BAUD and BUSCLK

Question asked by ROB LUND on Aug 29, 2012
Latest reply on Sep 13, 2012 by ROB LUND

So I'm confused.  I found this thread which only confirms my confusion.  I'm using a 9S08QE32 (though this question applies to quite a few chips in the S08 family.

 

Page 21-22 of the QE32 reference manual states:

 

ICSOUT — This clock source is used as the CPU clock and is divided by two to generate the
peripheral bus clock, BUSCLK.

 

I have the FLL selected as my ICS, so therefore my rate is 8.372 MHz.  Further, my BUSCLK would be 4.186 MHz, right?

 

For my SCI port, page 222-223 says the BAUD is calculated with:

 

BAUD = BUSCLK / (SBR[12:0] * 16)

 

Or written a different way:

SBR = BUSCLK / (16 * BAUD)

 

But my baud calculations are off.  It's as if the BUSCLK is off by that factor of two.  If I set my BAUD to 9600, the serial port actually is working at 19200.  2x error.

 

What am I missing here?

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