i have a question:
what does SW reset do, that HW reset doesn't? and what does HW reset do, that SW reset doesn't?
thank you very much for your time,
It depends on the chip. Are you asking in reference to a particular family (PPC, MPC, MCF, ARM, 8 bit, 16 bit, i.MX, Qorivva), a particular generation (like CF1, CF2, CF3, CF4) and a particular model?
In a lot of chips, the Software Reset is a very convenient chip feature that lets you force a hardware reset from your software. If the chip doesn't have this feature you have to wait for the watchdog to bite (assuming it is enabled and running) or you have to connect a GPIO pin to the reset pin or reset controller and use that instead. If the chip has a "Reset Reason Register" it allows the code to know if it has been reset by power on, hardware reset, watchdog, software or other things (like clock failure). It can do different things depending on this. Power-on reset requires everything to be reinitialised. A Watchdog reset indicates a software or hardware problem. A Software reset may have left instructions (from the software to the bootstrap) in Static RAM to do something different to a normal reset.
With some systems a "software reset" can have the CPU assert the hardware Reset pin, and then keep executing.
actually i dont really know much about the controller, but i know that it is custom made, and has an e200z[six] and an e200z0 core in it. it has ninetysix kb of sram..and a bunch of other features. my collegues call the chip simply SPACE.
i've done a lot of reading on the question, basically no reset type (except total system startup, by switching on the power supply) will erase the ram, but a hardware reset is likely to change registers back to their defaults.
is this assumption correct?
Power e200Z6 and e200Z0 then. To find out what they do you have to read the Freescale manuals for those cores.
You'll find they spend most of their time telling you to read other books, which then tell you to read other books. Sometimes they tell you really important stuff (like the PPC bit numbering order) is detailed in another book when it isn't.
For what they do in Reset, these books refer you to "the Book E reset definition", so you have to find "Book E". Good luck on your hunt.
The core doesn't have a "software reset". The rest of the chip it is embedded in might supply a register the CPU can write to that forces a reset back to the core and resets other parts of the chip.
> is this assumption correct?
The reset state is detailed in the e200Z6 Reference Manual section "2.16.4 Reset Settings".
RAM is seldom "erased on power on" to a specific state unless there is special hardware to do this. It is best assumed to be random. Some types of RAM can get corrupted during reset if the hardware reset happens half way through an access cycle, so they may retain values across a hardware reset, but you can't rely on it. This can cause nasty random failures.
thank you for your help! i'll get back with some results!
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