Processing power (MIPS) of HC12

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Processing power (MIPS) of HC12

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RChapman
Contributor I
This message contains an entire topic ported from a separate forum. The original message and all replies are in this single message. We have seeded this new forum with selected information that we expect will be of value to you as you search for answers to your questions.
 
Posted: Wed Apr 20, 2005 11:56 am    
 
I am working on an autopilot for an airship/blimp, and I am considering using a HC12-derivative as the "flight computer". In order to compare different microcontrollers and their computing power, I would like to find out how much MIPS (or MFLOPS) the HC12 can achieve. I have till now assumed that it is a RISC processor with one instruction per bus cycle, which should give 25 MIPS @ 25MHz. Recently I read an article in "Elektronik Praxis (Dec 2003)" saying the HC12 gives about 8 MIPS.

Can anyone verify what is correct? I didn't find any definite information about this in the datasheets or on the Freescale website...

Thanx,
 
Posted: Wed Apr 20, 2005 8:20 pm    
 
OK well a S12 will run at 25MHz with say 3 clock per CISC giving about 8ish mips, but how do you plan to compare this to a RISC machine which will do less per instruction. Its mips doesn't look good but the S12 is used as the defacto controller within the automotive industry world wide for body control because of its peripheral feature set.

If you go an S12X it will run at 40MHZ and has a risc interrupt-i/o processor running at 80MHz and I have seen it execute algorithms at 9X that of a S12.
 
Posted: Sun Apr 24, 2005 10:26 pm    
 
Aren't you talking bus clock freegeek? The core clock is double the bus clock I thought. At 16MHz bus on my C32 the core is running at 32MHz right? The S12X runs a max 40MHz bus - 80MHz core clock? Also I believe the CPU12V or whatever guide will tell you the amount of clocks per a given instruction. Am I mistaken about the clock frequency or about the way the instruction clocks are defined? 16 MHz bus would be 32Mhz core clock so if an instruction took 3 clocks they are talking about 3 clocks of the 32MHz core right?
 
Posted: Sun Apr 24, 2005 10:31 pm    
 
Nope.
Posted: Mon Apr 25, 2005 10:10 am    
 
Thanks for the help guys, especially the hint for the S12X-family. Seems to be exactly what I need! Very Happy
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JJsupp
Contributor I
Have a nice day...
 
I think it is necessary to clarify this answer...
 
If I understand the manuals, the time of execution of an instruction depends on the kind of instruction itself, so, the hcs12 can run at 25MHz so the minor instruction cycle time takes 40nsec but some instructions take a little more, don't remember exactly the biggest but I'll say it could take 13 times the minimum instruction cycle time = 13 * 40nsec = 520nsec. Then I say the HCS12 can execute between 25 to near 2 MIPS (operating at 25MHz).
 
For this reason I consider the HCS12 as a little DSP.
 
Any comments are received, Charly.
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