Isolated GPIO & Relay Control design based on i.MX6Q/D/DL/S

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Isolated GPIO & Relay Control design based on i.MX6Q/D/DL/S

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Isolated GPIO & Relay Control design based on i.MX6Q/D/DL/S

     The document will give a reference design for those i.MX6 users who wants to use GPIO to control relays. Actually, it is not difficult to reach the purpos on hardware design, But if hardware engineer doesn't notice the PAD status after Power On Reset, Relays will produce unexpected action, For example, if using those pins with "PU 100K"(Pull Up by 100K), or "keeper", After power on and before system booting, relays begin to be operated(unexpected close or open)

    In recent days, one of imx6 user encoutered the similar issues when she debugged "GPIO control 32-channel relay output). So I drew a schematic on hwo to design Isolated GPIO, and how to use GPIO to contorl 24V-relay. In schematic, 8-channel GPIOs & Relays were supported.

    From i.mx6 datasheet, we can find most of PADs' status are "PU 100K", so in schematic, 8 GPIOs are all those PADs with "PU 100K". The following is design requirement:

(1) Turth table.

GPIO output  1 -------Relay  Close

GPIO output  0 -------Relay  Open

GPIO default 0 ------ Relay  Open

(2) GPIO should be Islated by optocoupler

(3) 8-Channel ,24V digital signals output

See attachment, please! Schematic is reference for i.mx6 users!

If you have some questions or good advice on the design, you can submit case to me by our official website.

NXP TIC Weidong Sun

Email: weidong.sun@nxp.com

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‎09-25-2017 12:41 AM
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