imx1024: FlexSPI B1 start address

bp1979 · ‎12-10-2023

Hi,

We are trying to figure out secondary flash on an IMX 1024. I am trying to wrap my head around the reference manual,but I can't find what I am looking for.

Could you explain some basics please?

The following table shows the system memory map:

Is the 6000 0000 address (FlexSPI / FlexSPI ciphertext) referring to flash? Because the flash we currently use starts at 0x6000 0000.

Because what I am looking for, is the start address of the flash connected to FlexSPI port B1.

Could you tell me the start addresses for the flash:

FlexSPI A1, FlexSPI A2, FlexSPI B1, FlexSPI A2?

And do I understand it correctly that 0x6000 0000 is an address in the AHB bus, which is just an address in the MCU, which is mapped to FlexSPI peripheral, which eventually knows how to access the actual flash device and can execute read/writes using a lookup table?

Since we are having a hard time getting access to the secondary flash on our custom board, we are looking for "some proof of life". So our plan was to just use JLink commander and attempt to erase the secondary flash. If that would work, then at least we know from a hardware point of view it's all good.

So mostly, I am looking for the flash start addresses of FlexSPI A1, FlexSPI A2, FlexSPI B1, FlexSPI A2.

Hope that somebody can get me some answers.

PS: I tried to read memory via JLink on address 0x8000 0000, because I thought that would map to secondary flash, but JLink is unable to read memory on that address

Gavin_Jia · ‎12-13-2023

Hi @bp1979 ,

Thanks for your interest in IMXRT series. I'd like to provide service for you!

Regarding the first part, you are right. 0x6000 0000 does refer to the memory-mapped address of the FlexSPI / FlexSPI cipher. It is used to access external flash devices connected to the FlexSPI port.

But for the second part, you misunderstand. Please refer to this section: 27.4.4 Flash memory map

All you need to know is the mapped address of the FlexSPI, which is also the address of A1, and the rest of the address can be calculated by yourself depending on the size of the Flash you specify.

Best regards,
Gavin

bp1979 · ‎12-16-2023

Hi @Gavin_Jia

Thank you very much for explaining.

I am using the nor polling transfer EVK example on our custom board, with a bunch of modifications I will leave out of this question for simplicity. Just want to know if you can confirm if I get this part right now.

In evkmimxrt1024_flexspi_nor_config.c the flash configuration is defined. This gets compiled and linked to the first 512 bytes in flash memory by the linker script. The internal bootloader (ROM code of MCU) reads back this portion and initializes flash.

const flexspi_nor_config_t qspiflash_config = {
    .memConfig =
        {
            .tag                  = FLEXSPI_CFG_BLK_TAG,
            .version              = FLEXSPI_CFG_BLK_VERSION,
            .readSampleClksrc=kFlexSPIReadSampleClk_LoopbackInternally,
            .csHoldTime           = 3u,
            .csSetupTime          = 3u,
            .controllerMiscOption = (1u << kFlexSpiMiscOffset_SafeConfigFreqEnable),
            .deviceType           = kFlexSpiDeviceType_SerialNOR,
            .sflashPadType        = kSerialFlash_4Pads,
            .serialClkFreq        = kFlexSpiSerialClk_60MHz,
            .sflashA1Size         = 4u * 1024u * 1024u,
			.sflashB1Size		  = 8u * 1024u * 1024u,
            .lookupTable =
                {
                    // Read LUTs
                    [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
...
...
...

In the above code, I added sflashB1Size to be 8MB. This way I assume that ROM code will do something with the FlexSPI peripheral and make it aware of the secondary flash. Is that correct? Please feel free to elaborate with details, we are trying to actually understand what we are doing and having a hard time so far :).

For the rest, since we can't spare SD_B1_05 for FlexSPI DQS, I modified the SystemInit to accomodate and make sure that DQS remains unmuxed, and that Flash speed is configured to 60 MHz instead of 133 MHz.

I of course muxed all relevant pins for FlexSPI, so that should be fine too.

In board.c I added a region for second flash as follows (no clue what this means or no clue what it does, again, feel free to elaborate so that we also learn something)

    /* Region 8 setting: Memory with Normal type, not shareable, outer/inner write back */
    MPU->RBAR = ARM_MPU_RBAR(8, 0x60400000U);
    MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_8MB);

Then finally, in the app.h I set the FLASH_PORT to B1 and also set the rx sample clock source to loopback internally here to ensure both flashes are not expecting DQS support and hopefully run in 60MHz.

I also had to change linker scripts, because the SDK example links stuff to SD_RAM which our custom board does not have.

Then, when I launch this project, it seems to successfully configure nor flash on port B, but I wonder what this really tells me. Can you confirm that initializing nor flash already actually communicates with the flash device? I am guessing no, and that successfully initializing flash B doesn't say all that much yet.

Then it goes wrong. The call after flexspi_nor_flash_init is some PRINTF statement. Stepping over this line hardfaults the application. The stacktrace is very interesting, it tried to make a jump to 0x6040 0000, where I configured my secondary flash. Why would it do that? What did I misconfigure?

When I comment out the PRINTF it will simply go wrong on the next function call.

I will attach "everything I got" in the hope you can assist me.

Attachment 1:

the MCU xpresso project (note that this tries to access Flash B which the EVKs don't have)

Attachment 2:

My own documentation I wrote while trying to get this to work.

bp1979 · ‎12-16-2023

Since we are trying to run flash at 60 MHz (due to not having DQS pin available for flashes), do we also need to modify the flex SPI clock? Below function is defined in app.h, do we need to do some magic to get a flexspi clock running at 60 MHz?

static inline void flexspi_clock_init()
{
#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
    /* Switch to PLL2 for XIP to avoid hardfault during re-initialize clock. */
    CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);    /* Set PLL2 PFD2 clock 396MHZ. */
    CLOCK_SetMux(kCLOCK_FlexspiMux, 0x2); /* Choose PLL2 PFD2 clock as flexspi source clock. */
    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2);   /* flexspi clock 133M. */
#else
    const clock_usb_pll_config_t g_ccmConfigUsbPll = {.loopDivider = 0U};

    CLOCK_InitUsb1Pll(&g_ccmConfigUsbPll);
    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 24);   /* Set PLL3 PFD0 clock 360MHZ. */
    CLOCK_SetMux(kCLOCK_FlexspiMux, 0x3); /* Choose PLL3 PFD0 clock as flexspi source clock. */
    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2);   /* flexspi clock 120M. */
#endif
}

bp1979 · ‎12-16-2023

When I link the entire application to RAM, I can read the vendor ID, enable quad, and erase a sector.

The vendor ID = 157, which we confirmed on a 1021 EVK (we have the same flash module connected to our FlexSPI B1 as the EVK 1021 uses). So at least that looks promising.

But, I don't trust that it actually erased something on flash. When I open the memory page and try to read the address where second flash should start it can't read the memory.

So I have to problems:

- we can't run this SDK example from flash, because it makes a weird jump to 0x6040 0000

- when we link to SRAM, we can't read the memory on flash B

bp1979 · ‎12-16-2023

One last update from my side in the hope the information helps troubleshooting or coming with ideas on your side.

When again, I link the app to RAM, and monitor the flash memory in the memory monitor I can see something a bit strange I think.

When I put a breakpoint just before I execute the function "flexspi_nor_flash_init" :

- the flash memory A module seems to read back 0xFF bytes (expected, because the last part of flash is completely erased). The

- the flash memory B modules seems to read back 0x00 bytes (I think also expected, because I haven't executed "flexspi_nor_flash_init" yet)

But then, when I execute the function by stepping over, the memory monitor seems to no longer be able to read either of the flash modules.

I am however still able to read the vendor ID which gives "157" in my case. I can also erase a sector, but reading back memory on 0x6040 0000 will immediately hard fault (which also makes sense, because the memory monitor also indicates the memory is not accessible.

I will wait for further input from your side, I hope you can make sense of all the info I dropped on you....