iMXRT1050 with LCD 24bpp and Ethernet

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iMXRT1050 with LCD 24bpp and Ethernet

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davidouatt08
Contributor I

Hello,

On a board, I have an iMXRT1052 or iMXRT1062 (pin to pin compatible) with ethernet in RGMII (ENET_RX_DATA0/DATA1, ENET_TX_DATA0/DATA1), and I need to add an LCD. I have check on datasheet and it seems like only 16bpp is possible.

Can you confirm that it is possible to have an RGB bus in 24bpp for the LCD or only 16bpp will be possible? 

Thanks

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello, David 

According to the datasheet section 1.1, the parallel RGB LCD interface supports 8/16/24 bit interface. 


Have a great day,
Victor

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davidouatt08
Contributor I

Yes thank you Victor,

I know that 24bpp is possible, my question is :24 bpp possible with ethernet in RGMII (ENET_RX_DATA0/DATA1, ENET_TX_DATA0/DATA1) or only 16bpp will be possible since the pins of ENET are shared with LCD? Or in other words, is it possible to have 24bpp LCD and remap the ENET signals on other pins in order to have both functions working at the same time?

Regards

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victorjimenez
NXP TechSupport
NXP TechSupport

Hello, David 

Thanks for clarifying, which pins are the ones you find conflicts? 

  • For ENET_TX_DATA00, instead of IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_07, you can use IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22. 
  • For ENET_TX_DATA01, instead of IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_08, you can use IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21. 
  • For ENET_RX_DATA00, instead of IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_04, you can use IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20. 
  • For ENET_RX_DATA01, instead of IOMUXC_SW_MUX_CTL_PAD_GPIO_B1_05, you can use IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19. 

Regards, 

Victor 

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