iMXRT FlexSPI cache

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iMXRT FlexSPI cache

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GiulioDallaVecchia
Contributor I

Hi NXP Team,

I'm working on a project where I'm using a iMXRT1064. I need to read/write from/to an external flash memory through the FlexSPI peripheral. Inside the SDK there is an example (https://github.com/nxp-mcuxpresso/mcux-sdk-examples/blob/main/evkmimxrt1064/component_examples/flash... where you read, write and erase sectors from/to external flash memory. I don't understand why after each write and erase operation you invalidate the cache even if all operations are performed through the IPBus (using FlexSPI IP command). Read and write buffer are also located in DTCM memory that is non-cacheable.

Thanks a lot!

Giulio

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