I have an issue where data is apparently only being written to memory when the code is stepped in the disassembly view of the debugger.
It feels like a cache coherency thing, but I can't imagine how, since I'm not using any DMA etc. The CPU is simply reading and writing the on-chip memory.
The code simply looks like this:
memset( check, 0, sizeof check );
flash::read( flash::ADDR_SERIAL_NUMBER, check, sizeof check );
Inside read() it's just
uint8_t* dst = (uint8_t*)data; dst[rxi] = rx;
If I step through that in the disassembly, I can see the strb instruction write the data. But if I just let it run over the whole read(), nothing is written to check[]. It's not incorrect data; it's whatever data is there before the function call.
This seems to happen more when the amount of data read is small, which again feels like a cache thing (larger reads knocking out cache lines).
I've experienced the same with the data array in SRAM_DTC and in SRAM_OC2. The fact that it happens with tightly-coupled memory is extremely baffling.
Any suggestions welcome.
