i.mxrt1064 I2S configuration for adc and dac

[nanjun]

Hello,

How can the I2S be configured properly if I want to control ADC and DAC via TX part and RX part by a same I2S port simultaneously?

As I understood, is it correct that the part of TX_BCLK/SYNC/DATA/MCLK and RX_BCLK/SYNC/DATA/MCLK shall be connected to them respectively when the MCU operates in master mode.

Alternatively, is it possible that tx_data and rx_data line share the same clock part (for instance TX_BCLK/SYNC/MCLK)?

Thank you in advance.

Kind regards,

Neo

[xiangjun_rong]

Hi,

For the i.mxrt106x, As you knows that each SAI supports synchronous mode, in the mode, in the same SAI module, both the transmitter and receiver  can share the bit clock and frame clock, in other words, you can connect the TX_BCLK(bit clock) and TX_SYNC(Frame clock) to both the transmitter and receiver.

Hope it can help you

BR

XiangJun Rong

[nanjun]

Hello Xianjun,

thanks for your reply.

I am not sure that "you can connect the TX_BCLK(bit clock) and TX_SYNC(Frame clock) to both the transmitter and receiver." The texts in screen shot say that in synchronous mode, the transmitter and receiver are clocked by the RX_BCLK but use the TX_SYNC. Could you explain me more detailed? Thank you!

Kind regards,

Nanjun

[xiangjun_rong · Accepted solution]

Hi,

I am sorry, in the original pic I attached, I just want to show how to set the receiver SYNC bit instead of BCS bit, as you know that the bit clock and frame clock must be from the same source so that they can be synchronous  "in general", if you set the Transmitter as asynchronous  mode and set the receiver in synchronous mode, the bit clock/frame clock will be from transmitter, if you set the Transmitter as synchronous  mode and set the receiver in asynchronous mode, the bit clock/frame clock will be from receiver.

As an example, You can set the Transmitter as asynchronous  mode and set the receiver in synchronous mode, the bit clock/frame clock will be from transmitter, but drive both transmitter/receiver, in the case, the  BCS bit for both transmitter/receiver should be cleared.

Pls refer to section 38.4.3 Synchronous modes ion the RT1064RM.pdf

Hope it can help you

BR

XiangJun Rong

[nanjun]

Hello Xiangjun,

thanks for this information!

Kind regards,

Nanjun