Are there any IO pins to be allowed to input 3.3 voltage before applying CPU power?
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Hi @Eugene3 ,
We don't recommend you power on any IO before the chip is powered on, the reason is:
When RT pin is powered on before than the POR, the leakage will cause the DCDC PSWITCH to high, it will open the POR, but, please note, it can't meet the datasheet POR sequence, especially the following item:
datasheet, chapter 4.2.1.1 Power-up sequence
Then, it will cause the VDD_SOC_IN no voltage, the core can't work, then the chip can't work.
So, you can't let the RT pin have voltage before the RT MCU POR.
To this situation, in fact, some other customer use this hardware to resolve it:
Have buffet IC between the RT chip and the other device control port, I2C, UART ,SPI and GPIO.
The other customer used buffet IC is tc74vcx125ft.
Wish it helps you!
Best Regards,
Kerry
Hi @Eugene3 ,
We don't recommend you power on any IO before the chip is powered on, the reason is:
When RT pin is powered on before than the POR, the leakage will cause the DCDC PSWITCH to high, it will open the POR, but, please note, it can't meet the datasheet POR sequence, especially the following item:
datasheet, chapter 4.2.1.1 Power-up sequence
Then, it will cause the VDD_SOC_IN no voltage, the core can't work, then the chip can't work.
So, you can't let the RT pin have voltage before the RT MCU POR.
To this situation, in fact, some other customer use this hardware to resolve it:
Have buffet IC between the RT chip and the other device control port, I2C, UART ,SPI and GPIO.
The other customer used buffet IC is tc74vcx125ft.
Wish it helps you!
Best Regards,
Kerry
Hi @kerryzhou
Thank you so much. Your information will help my design.