I'm coming on-board to a new design using the i.MXRT1051DVL6A where the A0 silicon was specified in the BoM and the board was designed with 3V3 on the DCDC-In rail.
Looking in the datasheet, this rail appears to still have an Absolute Maximum rating that seems like it should withstand > 3V0 volts on DCDC-IN, but two boards that I'm working with draw so much current when 3V3 is put on the NVCC-* rails that the LDOs end-up current limiting and shunt the 3V3 rail to about 0.7V.
I've made a small mod where I put a diode in series to the DCDC-IN rail to try and limit it to ~3V but as soon as NVCC is connected the 3V3 rail tanks.
We can't wait for a board spin and are thinking of replacing the BGA MCU using a turnkey but wanted an opinion if 3V3 on A0 silicon will damage the MCU or if we should ensure that hardware mods are performed before powering-up the MCU after replacement.
I've isolated the SDRAM supply and the flash supply is connected to 3V3 directly; all told, it comes down to connecting the NVCC lines to the MCU where the overcurrent happens.
Any thoughts?
Thanks,
Scott Thompson, TC Helicon
Solved! Go to Solution.
Hi Scott
A0 erratum and datasheet (below) limited voltage to 3.0V, so 3V3 may damage chip
Best regards
igor
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Hi Scott
A0 erratum and datasheet (below) limited voltage to 3.0V, so 3V3 may damage chip
Best regards
igor
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Thank you. I was just coming in to check on the Errata for that mask. Now I have something to hand-wave to. Already have some A1 silicon on order to replace these guys.
Thanks for taking the time to answer my question.
Regards,
Scott Thompson, TC Helicon