i.MX RT1020 (in)compatibility with IS25LP128F

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i.MX RT1020 (in)compatibility with IS25LP128F

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stefanct
Contributor III

Hi,

I have replaced the flash chip of the EVK for the RT1020 (IS25LP64) with an IS25LP128F expecting it to be a drop-in replacement. However, it does not work at all and I think the reason for that is that ROM boot loader issues a SET READ PARAMETERS command that works differently for the IS25LP128 and the IS25LP128F.

Here is an excerpt of what I have captured after a hard-reset via SW5:

stefanct_0-1719840829342.png

As you can see the SPI master issues the command and sets the Read Register to F0. On the IS25LP128 this disables wrapping reads, sets the driver strength to its default and apparently also sets P4 which is part of the dummy cycles configuration and non-default but I think it's not too relevant.

Below you can see the difference in the description of the Read Register between the IS25LP128 and the IS25LP128F. The meaning of the top 3 bits is completely different as the number of bits to configure the dummy cycles has been extended and the driver strength bits have been moved to a new Extended Read Register.

stefanct_0-1719840303522.png

Can you confirm these findings?

We would like to boot from the IS25LP128F. Is there a workaround available (maybe via DCB or some values in the first page/sector)?

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stefanct
Contributor III
Since there were only reads issued by the ROM code I looked closer at what it actually reads. I think the SPI commands sent by the ROM code only depend on the const flexspi_nor_config_t qspiflash_config variable in the .boot_hdr.conf section (usually defined in evkmimxrt1020_flexspi_nor_config.c). It contains a configCmdEnable that defaults to 1. Once this is changed to 0 the invalid set read register command is gone. The FlexSPI LUT and all the details of the config cmd are configurable there. (Just disabling the config cmd did not make my setup boot, yet, but one step at a time).

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stefanct
Contributor III
Since there were only reads issued by the ROM code I looked closer at what it actually reads. I think the SPI commands sent by the ROM code only depend on the const flexspi_nor_config_t qspiflash_config variable in the .boot_hdr.conf section (usually defined in evkmimxrt1020_flexspi_nor_config.c). It contains a configCmdEnable that defaults to 1. Once this is changed to 0 the invalid set read register command is gone. The FlexSPI LUT and all the details of the config cmd are configurable there. (Just disabling the config cmd did not make my setup boot, yet, but one step at a time).
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