Hi,
We are developing a new board with two octal flash memories with DQS (data strobe) with a RT1176 processor.
It is possible to use two octal memories on the flexSPI bus with the data strobe signal for each memory ? I have some difficulties to understand the reference manual (i.MX RT1170 Processor Reference Manual, Rev. 1, 05/2021, pagge 2333) on this point.
If yes :
What is the correct pin assignement for DQS pin and chip select pin ?
Example : A_SS0_A and DSQ_A for memory octal A, B_SS0_B and DSQ_B for memory octal B....
What is the flexspi mode ?
Example : COMBINE or PARALLEL. or INDIVIDUAL.
Thank you.
Regards,
Vincent.
Dear @vincent_massonn
Thanks a lot for reaching our technical support. I was assigned to handle your case I am happy to assist you.
Regarding your questions see my answers below:
"It is possible to use two octal memories on the flexSPI bus with the data strobe signal for each memory ?"
--Yes, it is possible.
"What is the correct pin assignment for DQS pin and chip select pin ?"
--Please see the picture attached below from Data Sheet about the DQS pins for FlexSPI:
Additionally to this questions, I think that these couple of threads from our community are very helpful to solve your concern:
https://community.nxp.com/t5/i-MX-RT/Can-FlexSPI-DQS-be-ignored/m-p/1522033#M21629
"What is the flexspi mode ? "
--Individual.
Please let me know if you have some additional questions or something more I can help you with.
Sincerely,
Pablo Avalos.