Octo SPI

[john71]

I look at the diagram. (IMXRT1160RM.pdf)

This is a master side. As I understand read/write direction is set with A_DQS pin on a slave side.

I have to implement a slave side on FPGA. When I should set the data bus in High-Z state on a slave side? And the master side - when the data bus is input? A_DQS  = 1?

Is there any example of the master? I found only Quad SPI examples.

[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
Firstly, to provide the fastest possible support, I'd highly recommend you to refer to the post to learn the DQS Signal, next, please refer to the FlexSPI demos to learn how to contact the slave device.
Have a great day,
TIC

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[john71]

Thanks a lot for the link. As soon as I will learn chines I'll use it.

Meanwhile as I try to implement a slave side I need to understand - how can I control a master read cycle as a slave.

Regards.