Multiple simultaneous PCS lines for LPSPI on rt1050?

[jackking]

I am using SPI for control of an LCD driver chip which uses the standard CS (chip select) plus D/C (data/command). 

I don't see a way to assert multiple PCS lines for a frame in the FIFO.  Asserting the D/C via GPIO works, but doesn't allow full performance using the FIFO, because the FIFO timing is async from the GPIO.

Any ideas on this? This was a feature of the Kinetis chip I used previously.

thanks

[jackking]

Not a solution specifically, but I worked around this using 9-bit SPI instead of a dedicated D/C chip select.  This is a feature of the LCD controller I am using (st7789).  The ninth bit of the frame is used to set the D/C value, using only a single CS.