Hello,
I'm working with an application that runs on a i.MXRT1050 and 1160 with a custom LPSPI driver. I use GPIOs for the chip select pins.
Unluckily, I have two SPI devices connected, that use different CPOL settings. So I have to switch these settings between the transfers. With GPIOs as chip select, I first set the GPIO and then start the transfer via TCR / TDR. Due to that, the idle level of the clock line changes after the chip is selected and the device chip interprets that as a clock.
Is there a possibility to manually set the idle level of the SPI clock line between two SPI transfers without doing a whole byte of dummy transfer?
With kind regards
Christian
Solved! Go to Solution.
Hello @christian_mauderer,
Unfortunately, there is not possible to manually set the idle level of the SPI clock line between transfers without doing a whole byte of dummy transfer. As mentioned in the i.MX RT1050 Processor Reference Manual, the CPOL bit cannot be modified during a data transfer:
[Table 47-3. LPSPI Command Word in Master mode]
Kind regards, Raul.
Hello @christian_mauderer,
Unfortunately, there is not possible to manually set the idle level of the SPI clock line between transfers without doing a whole byte of dummy transfer. As mentioned in the i.MX RT1050 Processor Reference Manual, the CPOL bit cannot be modified during a data transfer:
[Table 47-3. LPSPI Command Word in Master mode]
Kind regards, Raul.
Hello @RaRo,
thanks for your response. It's what I assumed. I'll find a way to work with it.
With best regards
Christian Mauderer