iMXRT117x: is it recommended to use keeper logic for ADC input pads?

[TCL_1]

Hello:

We have a question about the ADC input circuit design of the iMXRT1175 processor.

There are default internal pull down resistors on ADC input pads, it causes large voltage deviation for our high input impedance application*. We must to select input keeper to disable these internal pull down resistors, but we still have some concerns as below.

• The input keeper seems work for digital signal, not analog signals.
• The LPADC reference code form NXP keeps these internal resistors.

*Note: we have no real time and high accuracy requirement for our ADC application, so about 10K ohm input resistors were used, then we found the large deviation.

e.g. 3.38V power rail, use divider R1/R2 - 22.1K/10K, the theoretical divided value (that ADC input voltage) should be 3.38*10/(10+22.1)=1.05V. But R2 paralleled with internal 35K PD is about 7.78K, the divided value actually is 0.88V, consistent with my measurement 0.87V, the deviation is about -17.1%. After select Keeper logic to disable the internal PD, the measurement is 1.04V, it’s in expectation.

BR,

Tyrone

[Omar_Anguiano · Accepted solution]

Hello
Hope you are well.
For this, I suggest you disable the internal pull resistors. The example keeps them disabled, it only drives high the drive strength.

To achieve the best performance I suggest you follow the advices from this application note: https://www.nxp.com/docs/en/application-note/AN4373.pdf

If you have more questions do not hesitate to ask me.
Best regards,
Omar

[TCL_1]

Hi Omar,

I have several custom designs based on iMXRT117x. In another design, I added voltage follower circuits as front input for LPADC module, as suggested: https://www.nxp.com/docs/en/application-note/AN4373.pdf

Furthermore, I disabled the ADC IO's internal Pull resistors as we discussed before. But I found there is about 4% deviation between the real voltage and ADC reading. It seems not caused by leakage current the Errata mentioned, because the output impedance of voltage follower is too small to cause such deviation (0.0666V, 166LSB), and I don’t find any voltage drop on ADC IO when ‘Keeper’ is selected. I don’t know the root cause yet.

 

As my workaround, I enabled the default internal Pull-Down resistors for my application, the impact from this resistor is ignorable because the very low output impedance of voltage follower circuits. But for my other designs, there are no voltage follower AP circuit for ADC inputs (and no space to add them). 

So, would you please explain the 'Keeper' mechanism and how above problem was occurred?

Many thanks!