Hi, Kerry! Thanks very much for the response. Maybe it would be easier if we go through the areas I'm having trouble. Here's the flexspi_nor_config.c (base on the evkbmimxrt1170_... file) that I've tried to adapt to the Macronix:
/* Based on evkbmimxrt1170_flexspi_nor_config.c & adapted to the Macronix MX66L1G45G device. */
#include "flexspi_nor_config.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.xip_board"
#endif
/*******************************************************************************
* Code
******************************************************************************/
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
__attribute__((section(".boot_hdr.conf"), used))
#elif defined(__ICCARM__)
#pragma location = ".boot_hdr.conf"
#endif
#define FLASH_DUMMY_CYCLES 0x06
#define FLASH_DUMMY_VALUE 0x01 /* See MX66L1G45G Data Sheet Table 10 "Quad Output Fast Read" @ 104 MHz */
const flexspi_nor_config_t qspiflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
// Enable DDR mode, Wordaddassable, Safe configuration, Differential clock, etc.
.controllerMiscOption = (0x1 << | (0x1 << 4),
.deviceType = kFlexSpiDeviceType_SerialNOR,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = kFlexSpiSerialClk_100MHz,
.sflashA1Size = 128u * 1024u * 1024u,
/* Enable flash configuration feature */
.configCmdEnable = 1u,
.configModeType[0] = kDeviceConfigCmdType_Generic,
/* Set configuration command sequences */
.configCmdSeqs[0] =
{
.seqNum = 1,
.seqId = 12,
.reserved = 0,
},
/* Macronix Configuration Register? (page 38): write the DC[1:0] bits, set "4 BYTE", default ODS[2:0] */
.configCmdArgs[0] = (FLASH_DUMMY_VALUE << 6) | (0x1 << 5) | (0x7),
.lookupTable =
{
// Read: (4READ4B)
[0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEC, RADDR_SDR, FLEXSPI_4PAD, 0x20),
[1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, FLASH_DUMMY_CYCLES, READ_SDR, FLEXSPI_4PAD, 0x04),
// Read Status: (RDSR)
[4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),
// Write Enable: (WREN)
[4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0),
// Erase Sector: (SE4B)
[4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x21, RADDR_SDR, FLEXSPI_1PAD, 0x20),
// Erase Block: (BE)
[4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8, RADDR_SDR, FLEXSPI_1PAD, 0x18),
// Page Program: (PP4B)
[4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x12, RADDR_SDR, FLEXSPI_1PAD, 0x20),
[4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
// Erase Chip: (CE)
[4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP, FLEXSPI_1PAD, 0x0),
// Set Read Parameters: (Winbond - [6:4]: 6 Dummy Clocks 0b000; [1:0]: Wrap Length 0b01 (ignored in SPI mode) Sect 8.2.23)
// Set Burst Length: (Macronix - 0x01 sets 16-byte wrap ??? (should be 0x02) (0x1x to disable wrap) Sect. 9-25)
[4 * 12 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xC0, WRITE_SDR, FLEXSPI_1PAD, 0x01),
[4 * 12 + 1] = FLEXSPI_LUT_SEQ(STOP, FLEXSPI_1PAD, 0x00, 0, 0, 0),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.ipcmdSerialClkFreq = 0x1,
.blockSize = 64u * 1024u,
.isUniformBlockSize = false,
};
#endif /* XIP_BOOT_HEADER_ENABLE */
My first concern is the LUT sequence [4 * 12 + 0]. The 0xCO instruction to the Flash is Winbond's "Set Read Parameters" (W25Q512NW Data Sheet Section 8.2.23) with the data value 0x01. Is the intent to enable the Winbond's wrap? It appears to be setting 6 dummy clocks and that's all. The third paragraph is particularly confusing as it seems to say a different instruction (0x77) is needed to set the wrap length.
For the Macronix device (MX66L1G45G Data Sheet Section 9-25) the data value 0x01 will set a 16-byte wrap, which seems decidedly wrong as the cache lines are 32 bytes, right?
Next, I can't make any sense of this portion of the structure definition:
/* Set configuration command sequences */
.configCmdSeqs[0] =
{
.seqNum = 1,
.seqId = 12,
.reserved = 0,
},
/* Macronix Configuration Register? (page 38): write the DC[1:0] bits, set "4 BYTE", default ODS[2:0] */
.configCmdArgs[0] = (FLASH_DUMMY_VALUE << 6) | (0x1 << 5) | (0x7),
Is the intent to write to the Macronix Configuration Register? If so, I believe my values are correct for the Macronix but I can't be sure because I can't figure out if the original Winbond code accomplishes the same thing.
Thanks very much for all your help.
Dave
