blhost SPI ISP

[Aruiya]

When I compile the blhost tool into the SOC and upgrade the rt685 by SPI ISP, the first few steps are successful. However, when the image is finally written to the specified address, it will report a failure to receive a response and timeout error. Can you help me to see what step the problem is? As shown in the figure below.

The command executed is shown in the figure below:

but the UART interface has been used before and can be upgraded successfully.

The frequency, SOC and MCU sides are synchronized, and the stability of the SPI cable has been verified, as this SPI is also used for audio data transmission.

Thank you

[kerryzhou]

Hi Aruiya,

   Thanks for your interest in the NXP MIMXRT product, I would like to provide service for you.

   Before you do the write operation(which is failed), I find you also do the erase operation, after do the erase operation, and before the write operation, could you please also readout the related write memory? Whether it is really erased or not?

   If the related area is really erased, in the write command, please enlarge your timeout time from 5000 to a longer time, do you calculate the write time about the SPI, whether your 5000 is enough to write the related area? Can you try to write just some bytes, whether it can be successful or not?

   Please do it and share your test result.

   Waiting for your updated information.

Best Regards,

Kerry

[Aruiya]

In recent days, I have tried to write at 5MHz again, which can succeed occasionally.

In the case of failure timeout, I use logic analyzer to analyze as follows:

Each packet is sent in 512 bytes. Before the next normal transmission, it will receive the rt685 return of 0x5a and 0xa1, which means start byte and packet type ack.

In the case of failure timeout, the SoC side has not received start byte 0x5a, but only received packet type ACK 0xa1.

Areas of failure above:

Thank you

[Aruiya]

Thank you very much for your advice.

First of all, I try to modify the timeout time you said. After changing it to 30s, however, it will still report that the start byte cannot be received and will timeout.

Then, I try to write less data to flash. The results are as follows:

    SPI Speed:100KHz,ISP failed, the instruction before write memory has failed.

                      500KHz,ISP failed, the instruction before write memory has failed.

                      1MHz,If the write file is less than 10kbytes, It has a high probability of being successfully written; if it is more than 10kbytes, It has a low probability of success, generally it fails after writing a part.

                      2MHz,If the write file is less than 10kbytes, It has a high probability of being successfully written; if it is more than 10kbytes, it has a low probability of success, generally it fails after writing a part.

                      5MHz,If the write file is less than 7kbytes, It has a high probability of being successfully written; if it is more than 7kbytes, it has a low probability of success, generally it fails after writing a part.

                      10MHz,ISP failed, the instruction before write memory has failed.

So does SPI ISP need additional commands?

Thank you