Use external clock source with FlexIO2

[markflamer]

I am sampling an external ADC using the FlexIO2 module with DMA. This works very well so far. Is there any option to drive the FlexIO2 module with an external, very low jitter clock? I see CCM_PLL3_BYP as an option in the clock tree, but no further explanation on how to use it. 

Thanks!

[markflamer]

Hi Diego, thank you very much for this support. I was actually hoping to drive the FlexIO module with a separate external clock source, not the 24MHz oscillator. I have been using a 100MHz clock to increment one of the FlexIO timers (not drive the full FlexIO module), with some success. However I discovered that the shifter still has to synchronize with the FlexIO clock before it can receive any data. This is described in the data sheet 50.3.3.2. This may not be a problem for me as long as I run the FlexIO clock faster than the timer, so there are no missed cycles.

The main issue I'm having now is that sometimes when I start the sampling It works perfectly and other times it will miss a sample every 32 samples. This is shown in the attached images. Any idea why this would be happening intermittently? If it starts up running properly, it will run forever like this. If I reset it, and it starts up missing the samples it will continue like that until I reset it again.

I'm using 2 chains of 4 shifters. Each chain of 4 shifters shifts in (receives) 4 bits each clock. This creates an 8bit parallel sampling system. When the shifters are full I trigger a DMA transfer. This works very well at up to 80MSPS. At 100MSPS I start to get the occasional but stable glitching I described above.  

Thanks!

[diego_charles]

Hi @markflamer 

Could you try to link application to execute from internal SRAM , or on chip SRAM?

This can be done with MCUXpresso, it is project properties->settings> managed linker script> link application to RAM.

I want to see if there is a way where we could improve the performance, besides clocking , executing code from on chip SRAM improves code performance.

I do not know about your ADC sampling limits and setting.

Best regards,

Diego

[markflamer]

Hi @diego_charles 

I don't think there is any issue with the instruction fetch speed. The pin sampling is through FlexIO and the data is moved with DMA. So, there is no code execution bottleneck. 

This really seems to be a FlexIO shifter or DMA timing issue. I see the same problem with certain combinations of FlexIO clock rate (FLEXIO2_CLK_ROOT) and ARM core clock (AHB_CLK_ROOT). For example of I run the FlexIO clock (FLEXIO2_CLK_ROOT) at 60MHz and the ARM core clock (AHB_CLK_ROOT) at 816MHz, FlexIO will always shift in a 0 every 32 samples. This pattern of 32 samples is exactly when the FlexIO buffers are full and a DMA transfer is triggered.

Is there someone there who is an expert in the FlexIO and DMA modules who might have some insight as to why this happens?

Thank you very much for your help on this.

[markflamer]

@diego_charles, shold I post this in a new thread? This one was old and I don't want it to get missed. Thanks!

[diego_charles]

Hello @markflamer 

I hope that you are doing well!

As you mention you can use the CCM_PLL3_BYP to connect directly the FlexIO to the external 24 MHz oscillator.

You will need to implement some code here. The easiest way to do this is using our Config Tools Clocks tool. Basically you can view the MCU clock three and edit muxes, and then proceed to generate code using the tool .The generated code must be called by your application code, or you can just take it as reference.

In case you where wondering, above you will see the an snapshot of the RT1010 clock three. FlexIO IP is similar with i.MX RT and Kinetis devices.

The config tools is integrated into the MCUXpresso IDE , and we also have a desktop version that could generate code for IAR and KEIL IDEs or ARM GCC.

Let me know if you need further assistance with this, or if I could recommend you additional material in  case you need to get started with our Config tools.

Thanks for your patience,

Diego