QuadSpi as general purpose "parallel" SPI?

[mountainee]

I am currently evaluating the i.MX RT1064 and its RT10xx cousins.

I have 4 identical high bandwidth SPI peripherals that I need to control in identical ways (analogous to SIMD), but I need a separate MOSI and MOSI line per each of the four peripheral.  I therefore need 9 lines: 1-CLK, 4-MOSI, 4-MISO with a MISO/MOSI pairs for each peripheral (see attached simple schematic).  Is it possible to map Quad SPI back to a dumb full-duplex mode?  I'm looking to just DMA block of data into memory. 

[jeremyzhou]

Hi

Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
Q1) Is it possible to map Quad SPI back to a dumb full-duplex mode?
-- Actually, I'm not very clear with this question, whether you can explain it.

Have a great day,
TIC

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