Hello!
I'm using lpuart and lpspi drivers with EDMA. For applying EDMA, buffers must be located in noncacheable regions of RAM with AT_NONCACHEABLE_SECTION_INIT macro. But in lpspi example lpspi_master_edma_handle_t structure is also located in this section unlike lpuart_edma_handle_t structure which is not located in noncacheable region. Should these two structures be located in noncacheable region or it doesn't matter?
Solved! Go to Solution.
Hi @embeddman ,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) Should these two structures be located in non cacheable region or it doesn't matter?
-- It doesn't matter.
Have a great day,
TIC
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Hi @embeddman ,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) Should these two structures be located in non cacheable region or it doesn't matter?
-- It doesn't matter.
Have a great day,
TIC
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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