MIMXRT1170-EVKB slave LinkServer debug timeout

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MIMXRT1170-EVKB slave LinkServer debug timeout

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VassiliN
Contributor III

I am having a trouble running debug session for the Slave session on M4 of MIMXRT1170-EVKB. 

Since some samples of Master/Slave projects run just fine,. I assume I am missing some  required settings. 

 

Enable auto-debug secondary project(s) for multicore projects checked. 

I generated two new C projects from SDK for the cm7 <Master> and cm4 <Slave> as described in MCUXpresso IDE User Guide. Removed flash memory mapping for the Slave project, set  "Attach only" in LinkServer Debugger section of the launch for the slave project. 

Now when I run debug I see LinkServer starts the master process, connect to localhost:10989 the and I let it run, then the LinkServer discovers the second target but then it times out each time on localhost:10990. 

 

Error in final launch sequence:

Failed to execute MI command:
-target-select extended-remote localhost:10990
Error message from debugger back end:
localhost:10990: Connection timed out.
Failed to execute MI command:
-target-select extended-remote localhost:10990
Error message from debugger back end:
localhost:10990: Connection timed out.

 

 

 

 

Please note: I have boot_multicore_slave() call in my <Master>

 

project generated by IDE. 

I don't see this call in multicore sample applications. Is it some obsolete API? 

Do I need to use MCMGR_ instead? 

 

 

 

 

 

 

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VassiliN
Contributor III

So it looks like I am the only one who can help me here.

Anyways I hope somebody will find it useful. 

 

1. boot_multicore_slave() seems to be obsolete, however creating the Multicore projects in MCUExpresso from the MIMRT1170-EVK 2.15.100 SDK still inserts it instead of MCMGR_ functions. As mentioned here: https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Unresolved-Inclusion-quot-boot-multicore-slave-h...

Regarding the problems when creating a multicore project from scratch, this is a problem with the SDK. The corresponding team is already checking this, so it will be fixed in future releases. In the meanwhile, instead of creating a multicore project from scratch, you will need to use as a base one of the SDK example projects and add the drivers that you want. 

It was in May 2021 and does not seem to be fixed by now. 

So replaced boot_multicore_slave() with 

MCMGR_EarlyInit()

MCMGR_Init()

MCMGR_StartCore() on Master side

and with 

MCMGR_EarlyInit() 

MCMGR_Init()

MCMGR_GetStartupData() on Slave side. 

 

2. Default available memory regions on the CM7 side don't contain 0x20200000 (size 0x20000) region which is used to map to the  SRAM_ITC_cm4 region 0x1FFE0000 on the CM4 side. Not sure why two different addresses here are used, while pretty much the rest of CM7 and CM4 memory are in the same address space. 

Details are available here:  https://www.nxp.com/docs/en/application-note/AN13264.pdf

So I added this alias region to CM7 memory map and set it to be used in for the slave image upload in MCU Linker/Multicore section of the CM7 project settings. 

 

Now I can run and debug both CM4 and CM7 using LinkServer. 

 

 

 

 

 

 

 

 

 

 

 

 

 

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VassiliN
Contributor III

So it looks like I am the only one who can help me here.

Anyways I hope somebody will find it useful. 

 

1. boot_multicore_slave() seems to be obsolete, however creating the Multicore projects in MCUExpresso from the MIMRT1170-EVK 2.15.100 SDK still inserts it instead of MCMGR_ functions. As mentioned here: https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Unresolved-Inclusion-quot-boot-multicore-slave-h...

Regarding the problems when creating a multicore project from scratch, this is a problem with the SDK. The corresponding team is already checking this, so it will be fixed in future releases. In the meanwhile, instead of creating a multicore project from scratch, you will need to use as a base one of the SDK example projects and add the drivers that you want. 

It was in May 2021 and does not seem to be fixed by now. 

So replaced boot_multicore_slave() with 

MCMGR_EarlyInit()

MCMGR_Init()

MCMGR_StartCore() on Master side

and with 

MCMGR_EarlyInit() 

MCMGR_Init()

MCMGR_GetStartupData() on Slave side. 

 

2. Default available memory regions on the CM7 side don't contain 0x20200000 (size 0x20000) region which is used to map to the  SRAM_ITC_cm4 region 0x1FFE0000 on the CM4 side. Not sure why two different addresses here are used, while pretty much the rest of CM7 and CM4 memory are in the same address space. 

Details are available here:  https://www.nxp.com/docs/en/application-note/AN13264.pdf

So I added this alias region to CM7 memory map and set it to be used in for the slave image upload in MCU Linker/Multicore section of the CM7 project settings. 

 

Now I can run and debug both CM4 and CM7 using LinkServer. 

 

 

 

 

 

 

 

 

 

 

 

 

 

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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, my name is Pavel, and I will be supporting your case, however I note that you find the solution thanks for sharing your steps to the community.

Best regards,
Pavel

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