Flex_spi interface of the RT1052

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

Flex_spi interface of the RT1052

跳至解决方案
252 次查看
jiaxin
Contributor I

Hi,sir

I am interested in establishing communication between two RT1052s using the FlexSPI interface. I am unsure about its feasibility, especially considering that the RT1052 is commonly employed for data interaction with an external slave SPI device.

 

How can one differentiate between master and slave when both devices are RT1052? Additionally, what measures should be taken to ensure accurate reception of data from the SPI?

0 项奖励
回复
1 解答
221 次查看
MultipleMonomials
Contributor III

FWIW, I don't believe that the FlexSPI interface is designed for communication between multiple MCUs.  The reason is, it always operates in master mode.  It doesn't have a "slave mode" where it would wait for clocks from another device and shift data in.  So, if you were to just hook two MIMXRTs' FlexSPIs together, there would be no way to put one of them in receive mode and have it receive a clock from the other chip.

If you wish to transfer data between two processors, there are several options available that likely will work better.  Using regular SPI (via the LPSPI peripheral), with one MCU configured as a master and another as a slave, would work fine.  Another option would be UART -- with a high clock speed and a DMA buffer backing it, URT can actually move lots of data very quickly.

在原帖中查看解决方案

0 项奖励
回复
6 回复数
214 次查看
HangZhang
NXP Employee
NXP Employee

Hi @jiaxin 

Unfortunately, FlexSPI is not designed for communication between MCUs. UART is generally used for communication between MCUs.

Hope this will help you.

BR

Hang

0 项奖励
回复
206 次查看
jiaxin
Contributor I
Hi,@Hang Zhang
There are still some doubts about this question, please help to answer it:
1. RT1052 cannot be configured as the slave station of Flex_spi for data interaction, right?
2. Is there any other bus that can support the data communication between the two MCUS? Because the current architecture of our project is: the data interaction between i.MX 8M Mini and RT1052 is carried out 2ms once through the dual-port RAM chip. Now we want to remove this dual-port RAM chip and see if there is any other bus that can achieve this goal;

Thank you!
jiaxin
0 项奖励
回复
208 次查看
jiaxin
Contributor I
Thanks for your reply, I get it
0 项奖励
回复
222 次查看
MultipleMonomials
Contributor III

FWIW, I don't believe that the FlexSPI interface is designed for communication between multiple MCUs.  The reason is, it always operates in master mode.  It doesn't have a "slave mode" where it would wait for clocks from another device and shift data in.  So, if you were to just hook two MIMXRTs' FlexSPIs together, there would be no way to put one of them in receive mode and have it receive a clock from the other chip.

If you wish to transfer data between two processors, there are several options available that likely will work better.  Using regular SPI (via the LPSPI peripheral), with one MCU configured as a master and another as a slave, would work fine.  Another option would be UART -- with a high clock speed and a DMA buffer backing it, URT can actually move lots of data very quickly.

0 项奖励
回复
210 次查看
jiaxin
Contributor I
Thanks for your reply, I can't think of how to configure one party's MCU to communicate in slave mode; It does not support such use, thank you!
0 项奖励
回复
228 次查看
jiaxin
Contributor I

Is there anyone available to assist with this matter, or do you require additional information?

0 项奖励
回复