Correct Initialisation of the SNVS LP Section on first powered boot i.MXRT1060

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Correct Initialisation of the SNVS LP Section on first powered boot i.MXRT1060

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keith1
Contributor I

According to the Reference Manual:

"Software should write the proper initialization value (41736166h) into the
LP Digital Low-Voltage Detector Register and clear the low-voltage event
record in the LP status register."

Section 20.5 Initialization of SNVS p1233

Using our code writing to the LP Digital Low-Voltage Detector Register is no problem. However the LP status register doesn't contain an entry called low-voltage event record.

What bit is the manual referring to?

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PabloAvalos
NXP TechSupport
NXP TechSupport

Hi @keith1 

 

Thanks a lot for reaching our technical support and for your patience.

 

Regarding your question, probably you are getting confused, LPLVDR is one register:

PabloAvalos_0-1680210886550.png

 

And LPSR is another one different: 

PabloAvalos_1-1680210931396.png

 

So, what the reference manual wants to say about: ""Software should write the proper initialization value (41736166h) into the LP Digital Low-Voltage Detector Register and clear the low-voltage event
record in the LP status register." is the fact to write the initialization on the first one I mentioned and then clear the low-voltage event record (at Software level, not HW level).

 

Hope this can clarify your concern, please let me know if you have some more questions regarding this.

 

Best Regards,
Pablo Avalos.

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keith1
Contributor I

Hello Pablo,

Thankyou for your reply.

We are aware that LPLVDR & LPSR are two seperate registers! Our question was that the only reference to the low-voltage event record is in the LPCR register (and as an aside it's not even enabled from reset...).

What do you mean by software, if there's no bit in the LPSR how is that to be monitored / cleared?

During our testing we've noticed something about the LPLVDR register.

From cold boot (i.e. the 3.3V SNVS supply goes to 0V), mimicking battery change for instance. In our case the LPLVDR is at 0x41736166 not 0x00000000. Which, according to the reference manual again it should do.

Is the i.MX RT1060 Processor Reference Manual wrong?

 

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