Confused about qspi chip status on 1060 eval board

[jautry]

I am reading the status reg of the qspi chip on the 1060 eval board, and the top 4 bits are always set.  This means the QE bit is set but also the protect bits.  Obviously the memory is not protected as I can program it, so does that mean if QE is set, the protect bits are meaningless?  Writing the register with the sample flexspi program seems to have no effect, 4 top bits always set.

[kerryzhou]

Hi @jautry ,

   Do you mean, you read MIMXRT1060-EVK board, ISSI IS25WP064AJBLE flash status register, and find the above 4 bit is high, right?

   Just like the following situation:

Please share your test result screen.

You can use this code to test it again:

SDK_2_11_1_EVK-MIMXRT1060\boards\evkmimxrt1060\driver_examples\flexspi\nor\polling_transfer

As it just write the QE bit.

Wish it helps you!

Best Regards,

Kerry

[jautry]

That is true, the top 4 bits were high.  But found I had made an error in the LUT tables.

[kerryzhou]

Hi @jautry 

    Which detail LUT issue you found?

    In fact, another good way, you can write the status register all back to 0, then read it out, then enable the bits which you want, just test it, whether that works OK or not?

  Best Regards,

Kerry

[jautry · Accepted solution]

My issue is that I wanted to read out more of the flash registers so kept adding LUT sequences forgetting there was a 16 limit.  Turns out the problem I was trying to solve was a bug in the SEGGER PLink flash loader with regard to larger flash devices.  They have found it and are releasing an update.