Can I use regular (stack) memory in fsl_dcp.c?

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Can I use regular (stack) memory in fsl_dcp.c?

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N-
Contributor I

Currently in the fsl_dsp.c a static variable is used from non-cacheable RAM:

```
AT_NONCACHEABLE_SECTION_INIT(static dcp_context_t s_dcpContextSwitchingBuffer);
```
It seems wasteful to reserve 208 bytes permanently to calculate a SHA once a week.
I could use the RAM for better purposes. So just a plain static buffer:
```
static dcp_context_t s_dcpContextSwitchingBuffer;
```

Now I did read the DCACHE invalidate application note but I am a little unsure how and when to implement this as the buffer is passed to the hardware via the DCP_Type->CONTEXT register.

I _think_ the following should do in dcp_hash_update_non_blocking():
```
DCACHE_CleanByRange((uint32_t)dcpPacket, sizeof(dcpPacket));
```

Anyone have any experience or done something similar with the DCP?

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EdwinHz
NXP TechSupport
NXP TechSupport

Hi @N-,

Could you please share the part number that you are using, along with the SDK example you are looking into and SDK and IDE versions?

BR,
Edwin.

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23 Views
N-
Contributor I

iMXRT1024, SDK 2.14.0, manifest version 3.13.0, MCUExpresso 11.8.1
The DCP example with the CRC32,SHA and AES calls using the DCP hardware.

The fsl_dcp.c at line 94 creates a non-cacheable variable which I would like to convert so it can use regular memory (on the stack or heap) using invalidate and clean.

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N-
Contributor I

Obviously the DCACHE_CleanByRange should be done before the __DSB and __ISB

(Ran out of time to edit the message)

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