Hi @VolcanicCheese
When you change the power mode to the low power mode, and you also need to use the SDRAM, you need to make sure the SEMC related clock can also be used or have a limit at first.
BTW, please refer to this application note:
How to use i.MX RT Low Power Feature (nxp.com)
Usually under any RUN mode, if the SPI Flash or SDRAM are used to store code or data, changing the root
clock’s frequency is not recommended. It is dangerous to R/W SPI Flash or SDRAM while changing their clock
source and frequency. If these operations have to do, the code should be run in On-Chip RAM.
If the code run in SDRAM and user wants to enter Suspend mode. SDRAM needs to wait a STOP signal to enter
self-refresh mode. Here if a STOP request is sent to SDRAM and polling for the acknowledge bit to be asserted,
the bit asserted might never get . Because the code is running on SDRAM and the transaction on SDRAM can’t
STOP. In this case, the code or data should be run in SPI Flash or On-chip RAM.
More details, please check that AN.
Wish it helps you!
Best Regards,
Kerry