Hi
I am putting the system in suspend mode (low power mode) using the command "echo mem > /sys/power/state" by this system is getting voltage dropped to 0.65V as it is also configured in the SPL code in uboot.
But my query is where the voltage setting is happening in any driver or any function code.
I have also checked by unloading the PMIC driver after that also system is getting voltage drop to 0.65V that means driver is not responsible to set the low power voltage.
please help in this.
Thanks.
Hi
We can update the register value for voltage drop in the SPL code but can we check somewhere in the code how the system is getting known about low power mode i.e. standby request? or we can't read that?
In my understanding the process should be first the system checks low power mode standby request then only voltage drop is happening through the register.
please help in this doubt.
thanks
Hi @Rita_Wang
Thanks for your time it's really appreciable!
I got that the SPL code is setting the standby voltage but is there any way that we can read when the standby voltage has occurred in code?
Because I guess the system should be reading somewhere the standby signal then a voltage change is happening.
Hi @sbmd_1234
I will take two week sick day leave, so for your update I maybe can not follow, sorry about it. I already ask for help to my colleague Joan she have more experience, she will give support to you. I help create new case 00620538 to her, do not worry we will support you. Thanks a lot for your kindly understandings
Keep happy and health
Wish you have a nice day
Best Regards
Rita
Hi @Rita_Wang
Thanks for this update!
Surely I will follow the new support you have created.
Take care of yourself and have a nice day.
Thanks.
@Rita_Wang I am using version 6.1-mickledore.
SUSPEND Mode: This mode is defined as the most power saving mode where all the clocks are
off (including the Cortex®-M33 CPU), all the unnecessary power supplies are off and all power
gateable portions of the SoC are power gated. The Cortex®-A55 CPU are fully power gated, all
internal digital logic and analog circuit that can be powered down will be off, and all PHYs are
power gated. DRAM is set at self-refresh/retention mode. VDD_SOC (and related digital supply)
voltage is reduced to the “Suspend mode” voltage.
You can see in the source code:
uboot-imx/board/freescale/imx93_evk/spl.c
if (IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)){
/* 0.8v for Low drive mode
*/
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x10);
pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x10);
} else {
/* 0.9v for Over drive mode
*/
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18);
pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18);
}
/* set standby voltage to 0.65v */
pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4);
Which version BSP are you using?