in 3.10.53 kernel:
CCM_CLKO1(audio i2s master)is 24MHZ , how to set to 11.2896MHzMHz
I change
imx_clk_set_rate(clk[pll4_audio_div], 541900800);
to
imx_clk_set_rate(clk[pll4_audio_div], 90316800); //8*11289600
question:
clk_get_rate(data->codec_clk) print the value is 11289600,
but the clock is still 22.5MHZ(11289600*2) by oscilloscope
in 3.10.53 kernel:
CCM_CLKO1(audio i2s master)is 24MHZ , how to set to 11.2896MHzMHz
I change
imx_clk_set_rate(clk[pll4_audio_div], 541900800);
to
imx_clk_set_rate(clk[pll4_audio_div], 90316800); //8*11289600
question:
clk_get_rate(data->codec_clk) print the value is 11289600,
but the clock is still 22.5MHZ(11289600*2) by oscilloscope