secondary QSPI boot

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secondary QSPI boot

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sapirbuz
Contributor IV

Hi,

We are using evaluation board IMXRT1050-EVKB and trying to boot from the secondary FlexSPI pins: 

GPIO_AD_B1_08
GPIO_AD_B1_09
GPIO_AD_B1_10
GPIO_AD_B1_11
GPIO_AD_B1_12
GPIO_AD_B1_13
GPIO_AD_B1_14
GPIO_AD_B1_15

We soldered a Flash to those pins:

sapirbuz_0-1658649995694.png

 

Our board's configuration:

BOOT_MODE[1:0]= 10 (internal boot)

BOOT_CGG[10:8]= 111

sapirbuz_1-1658650027742.png

Why does the internal boot still occur from Flash U33 (primary pins) and not from the secondary pins?

Should we do something else besides the HW setup I have mentioned?

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973 次查看
kerryzhou
NXP TechSupport
NXP TechSupport

Hi @sapirbuz ,

   As your connection is still the flexspi 1 A port, just the secondary pinout option for FlexSPI serial NOR flash boot.

  So the address still the same from 0X60000000.

 

Wish it helps you!

Best Regards,

Kerry

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984 次查看
jay_heng
NXP Employee
NXP Employee

Your HW settings are correct for you case.

Please try to dump below registers by Jlink-Commander to double check your HW settings

SRC_SBMR1 - 0x400F8004

SRC_SBMR2 - 0x400F801C

978 次查看
sapirbuz
Contributor IV

Our flash is IS25LP080D-JNLE-TR

datasheet: 

https://eu.mouser.com/datasheet/2/198/issi_s_a0003474186_1-2271392.pdf 

For now, we have 2 flashes connected to our board: U33 and our external flash (IS25LP080D-JNLE-TR).

For U33, the flash base address is defined as the following:

#define NOR_FLASH_START_ADDRESS (20U * 0x1000U) 

What is the base address of the secondary pins flash?

How can we program our external flash?

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974 次查看
kerryzhou
NXP TechSupport
NXP TechSupport

Hi @sapirbuz ,

   As your connection is still the flexspi 1 A port, just the secondary pinout option for FlexSPI serial NOR flash boot.

  So the address still the same from 0X60000000.

 

Wish it helps you!

Best Regards,

Kerry

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940 次查看
sapirbuz
Contributor IV

Thank you

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