According to the table 8 of i.MX6Solo/DualLite data sheet (MX6SDLCEC), the minimum of VDD_SNVS_IN is 2.9V
On the other hand, table 11 of this document defines the power consumption of SNVS mode at VDD_SNVS_IN = 2.8V which is 0.1V lower than the minimum voltage defined in table 8.
Does VDD_SNVS_IN support 2.8V?
For correct operation table 8 is correct, the minimum setting is 2.9V.
This supply also generates the 1.1V on SNVS_CAP which is the logic supply for the 32KHZ OSC and other logic.
The 1.1V is generated from a resistor divider from SNVS_IN, so when it drops to 2.8V the 1.1V will drop below min voltage to operate this logic.
Hi, Mrudang
>I guess you want to say why it is described as 2.9V instead of 2.8V in the datasheet, right?
yes, you're right.
Corrected question:「why minimum operating voltage is NOT described as 2.8V in the datasheet?」
Br,
Yuji
Hi Yutaka,
Yes, SNVS supply support 2.8V. Please refer the Note#7.
#7: While setting VDD_SNVS_IN voltage with respect to Charging Currents and RTC, refer to Hardware Development Guide for i.MX 6Dual, 6Quad, 6Solo, 6DualLite Families of Applications Processors (IMX6DQ6SDLHDG).
Regards,
Mrudang