imx8x hifi4 dsp sai peripheral

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imx8x hifi4 dsp sai peripheral

778件の閲覧回数
sbonnet
Contributor I

Hi,

I am not able to get i2s/sai signals out of the imx8qxp-mek using the hifi4 dsp.

Everything is working fine using the fsl,sai Linux driver. Correct i2s signals.

However using the Cadence binary hifi4.bin and the nxp test application for the DSP 

https://github.com/NXP/imx-audio-framework I cannot get the sai driver to work.

The issue is when I try to use the sai interface (c33) using the command 

$./dsp_test -f19 -d16 -c33 -isignal.raw

without the c33 parameter (that enables the sai output) the file is correctly read and written by the DSP

However with it the firmware is stuck in the edma configuration despite having the edma deactivated in the device tree. 

Here is the link to the device tree : https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8qxp-mek-...

We can see that sai1 bindings in the edma definition has been removed from the generic configuration :

https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8-ss-audi...

Also we can see that on the DSP User guide https://www.nxp.com/docs/en/user-guide/IMX_DSP_USERS_GUIDE.pdf

The device tree example for the imx8qm contains a reference to an audio interface but not on the imx8qxp.

 

Does anyone have been able to play an audio file using the imx8x and the hifi4 dsp binary.

 

Thanks !

 

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749件の閲覧回数
sbonnet
Contributor I

It seems the problem is related to the audio clock.

In the hifi4 firmware for the imx8x -> sai_driver 

On line 36 an instruction select the master clock source :

-> write32(sai_addr + FSL_SAI_TCR2(offset), FSL_SAI_CR2_MSEL_MCLK1);

and this does nothing

If I set FSL_SAI_CR2_MSEL_BUS (value zero) as the clock source however I get high speed clocks on four GPIOs. (not an usable solution this not the correct clock source so the signals are not modulated)

I am stuck as both the sof firmware and the fsl-sai linux driver are running almost the same code and are working on my platform (working i2s/tdm signals).

Here is the device tree I am using. Thank you all !

&dsp {
compatible = "fsl,imx8qxp-hifi4";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
power-domains = <&pd IMX_SC_R_MU_13A>,
<&pd IMX_SC_R_MU_13B>,
<&pd IMX_SC_R_DSP>,
<&pd IMX_SC_R_DSP_RAM>,
<&pd IMX_SC_R_IRQSTR_DSP>,
<&pd IMX_SC_R_SAI_1>,
<&pd IMX_SC_R_DMA_0_CH0>,
<&pd IMX_SC_R_DMA_0_CH1>,
<&pd IMX_SC_R_DMA_0_CH14>,
<&pd IMX_SC_R_DMA_0_CH15>,
<&pd IMX_SC_R_AUDIO_CLK_0>,
<&pd IMX_SC_R_AUDIO_CLK_1>,
<&pd IMX_SC_R_AUDIO_PLL_0>,
<&pd IMX_SC_R_AUDIO_PLL_1>;
clock-names = "ipg", "ocram", "core",
"sai1_bus", "sai1_mclk0", "sai1_mclk1", "sai1_mclk2", "sai1_mclk3";
clocks = <&clk_dummy>, <&clk_dummy>, <&clk_dummy>,
<&sai1_lpcg 1>, <&clk_dummy>, <&sai1_lpcg 0>,
<&clk_dummy>, <&clk_dummy>;
assigned-clocks = <&acm IMX_ADMA_ACM_SAI1_MCLK_SEL>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MISC0>,
<&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MISC1>,
<&sai1_lpcg 0>;
assigned-clock-parents = <&aud_pll_div0_lpcg 0>;
assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>;
mbox-names = "tx0", "rx0", "rxdb0";
mboxes = <&lsio_mu13 0 0>,
<&lsio_mu13 1 0>,
<&lsio_mu13 3 0>;

memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, <&dsp_vdev0vring1>, <&dsp_reserved>;
status = "okay";
};

 

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