imx8 mini M4 developement

[Ming]

What is the development tool (SDK/IDE) for M4 core?

[Takashi_Kashiwagi]

Hi Ming-san

Thank you for reply.

we resolved the issue by using macro offsetof.

It's a good way! I will try it.

BR

T.Kashiwagi

[Ming]

Hello? I am having some issues. Our project is being developed in c++ while SDK provides standard c lib. When I attempted to include some of those driver level headers in c++ source code, the compiler generated errors at compiling time. Extern C {} doesn't help since the errors occur at build time not at link time so it's not related to name mangling. Here is some the errors I observed:

In file included from /home/torsi/projects/sl-m4/freertos/devices/MIMX8MM6/drivers/fsl_common.h:384,
from /home/projects/sl-m4/freertos/devices/MIMX8MM6/utilities/debug_console/fsl_debug_console.h:25,
from /home/projects/sl-m4/coreapp/src/main.cpp:11:
/home/torsi/projects/sl-m4/freertos/devices/MIMX8MM6/drivers/fsl_clock.h:301:54: error: expression '((CCM_Type*)808976384)->CCM_Type::ROOT[1].CCM_Type::<unnamed struct>::TARGET_ROOT' has side-effects
kCLOCK_RootM4 = (uint32_t)(&(CCM)->ROOT[1].TARGET_ROOT), /*!< ARM Cortex-M4 Clock control name.*/
~~~~~~~~~~~~~~~^~~~~~~~~~~
In file included from /home/torsi/projects/sl-m4/freertos/devices/MIMX8MM6/fsl_device_registers.h:23,
from /home/projects/sl-m4/coreapp/src/main.cpp:10:
/home/projects/sl-m4/freertos/devices/MIMX8MM6/MIMX8MM6_cm4.h:5564:51: error: 'reinterpret_cast<CCM_Type*>(808976384)' is not a constant expression
#define CCM ((CCM_Type *)CCM_BASE)

If I changed main.c++ to main.c, no errors are generated. Any ideals to resolve the issues? Thanks.

[Takashi_Kashiwagi]

Hi Ming.

I saw the same error on DS-5.

It seems that the way to declare clock_root_control_t is not good.

So, I entered an immediate value as shown below, the error disappeared.

typedef enum _clock_root_control
{
#ifdef __CC_ARM
kCLOCK_RootM4 = (0x30380000u + 0x8000u + (0x80u * 1u)), /*!< ARM Cortex-M4 Clock control name.*/
kCLOCK_RootAxi = (0x30380000u + 0x8000u + (0x80u * 16u)), /*!< AXI Clock control name.*/
kCLOCK_RootNoc = (0x30380000u + 0x8000u + (0x80u * 26u)), /*!< NOC Clock control name.*/
kCLOCK_RootAhb = (0x30380000u + 0x8000u + (0x80u * 32u)), /*!< AHB Clock control name.*/
kCLOCK_RootIpg = (0x30380000u + 0x8000u + (0x80u * 33u)), /*!< IPG Clock control name.*/
kCLOCK_RootAudioAhb = (0x30380000u + 0x8000u + (0x80u * 34u)), /*!< Audio AHB Clock control name.*/
kCLOCK_RootAudioIpg = (0x30380000u + 0x8000u + (0x80u * 35u)), /*!< Audio IPG Clock control name.*/
kCLOCK_RootDramAlt = (0x30380000u + 0x8000u + (0x80u * 64u)), /*!< DRAM ALT Clock control name.*/

kCLOCK_RootSai1 = (0x30380000u + 0x8000u + (0x80u * 75u)), /*!< SAI1 Clock control name.*/
kCLOCK_RootSai2 = (0x30380000u + 0x8000u + (0x80u * 76u)), /*!< SAI2 Clock control name.*/
kCLOCK_RootSai3 = (0x30380000u + 0x8000u + (0x80u * 77u)), /*!< SAI3 Clock control name.*/
kCLOCK_RootSai4 = (0x30380000u + 0x8000u + (0x80u * 78u)), /*!< SAI4 Clock control name.*/
kCLOCK_RootSai5 = (0x30380000u + 0x8000u + (0x80u * 79u)), /*!< SAI5 Clock control name.*/
kCLOCK_RootSai6 = (0x30380000u + 0x8000u + (0x80u * 80u)), /*!< SAI6 Clock control name.*/

kCLOCK_RootQspi = (0x30380000u + 0x8000u + (0x80u * 87u)), /*!< QSPI Clock control name.*/

kCLOCK_RootI2c1 = (0x30380000u + 0x8000u + (0x80u * 90u)), /*!< I2C1 Clock control name.*/
kCLOCK_RootI2c2 = (0x30380000u + 0x8000u + (0x80u * 91u)), /*!< I2C2 Clock control name.*/
kCLOCK_RootI2c3 = (0x30380000u + 0x8000u + (0x80u * 92u)), /*!< I2C3 Clock control name.*/
kCLOCK_RootI2c4 = (0x30380000u + 0x8000u + (0x80u * 93u)), /*!< I2C4 Clock control name.*/

kCLOCK_RootUart1 = (0x30380000u + 0x8000u + (0x80u * 94u)), /*!< UART1 Clock control name.*/
kCLOCK_RootUart2 = (0x30380000u + 0x8000u + (0x80u * 95u)), /*!< UART2 Clock control name.*/
kCLOCK_RootUart3 = (0x30380000u + 0x8000u + (0x80u * 96u)), /*!< UART3 Clock control name.*/
kCLOCK_RootUart4 = (0x30380000u + 0x8000u + (0x80u * 97u)), /*!< UART4 Clock control name.*/

kCLOCK_RootEcspi1 = (0x30380000u + 0x8000u + (0x80u * 101u)), /*!< ECSPI1 Clock control name.*/
kCLOCK_RootEcspi2 = (0x30380000u + 0x8000u + (0x80u * 102u)), /*!< ECSPI2 Clock control name.*/
kCLOCK_RootEcspi3 = (0x30380000u + 0x8000u + (0x80u * 131u)), /*!< ECSPI3 Clock control name.*/

kCLOCK_RootPwm1 = (0x30380000u + 0x8000u + (0x80u * 103u)), /*!< PWM1 Clock control name.*/
kCLOCK_RootPwm2 = (0x30380000u + 0x8000u + (0x80u * 104u)), /*!< PWM2 Clock control name.*/
kCLOCK_RootPwm3 = (0x30380000u + 0x8000u + (0x80u * 105u)), /*!< PWM3 Clock control name.*/
kCLOCK_RootPwm4 = (0x30380000u + 0x8000u + (0x80u * 106u)), /*!< PWM4 Clock control name.*/

kCLOCK_RootGpt1 = (0x30380000u + 0x8000u + (0x80u * 107u)), /*!< GPT1 Clock control name.*/
kCLOCK_RootGpt2 = (0x30380000u + 0x8000u + (0x80u * 108u)), /*!< GPT2 Clock control name.*/
kCLOCK_RootGpt3 = (0x30380000u + 0x8000u + (0x80u * 109u)), /*!< GPT3 Clock control name.*/
kCLOCK_RootGpt4 = (0x30380000u + 0x8000u + (0x80u * 110u)), /*!< GPT4 Clock control name.*/
kCLOCK_RootGpt5 = (0x30380000u + 0x8000u + (0x80u * 111u)), /*!< GPT5 Clock control name.*/
kCLOCK_RootGpt6 = (0x30380000u + 0x8000u + (0x80u * 112u)), /*!< GPT6 Clock control name.*/

kCLOCK_RootWdog = (0x30380000u + 0x8000u + (0x80u * 114u)), /*!< WDOG Clock control name.*/

kCLOCK_RootPdm = (0x30380000u + 0x8000u + (0x80u * 132u)), /*!< PDM Clock control name.*/
#else
kCLOCK_RootM4 = (uint32_t)(&(CCM)->ROOT[1].TARGET_ROOT), /*!< ARM Cortex-M4 Clock control name.*/
kCLOCK_RootAxi = (uint32_t)(&(CCM)->ROOT[16].TARGET_ROOT), /*!< AXI Clock control name.*/
kCLOCK_RootNoc = (uint32_t)(&(CCM)->ROOT[26].TARGET_ROOT), /*!< NOC Clock control name.*/
kCLOCK_RootAhb = (uint32_t)(&(CCM)->ROOT[32].TARGET_ROOT), /*!< AHB Clock control name.*/
kCLOCK_RootIpg = (uint32_t)(&(CCM)->ROOT[33].TARGET_ROOT), /*!< IPG Clock control name.*/
kCLOCK_RootAudioAhb = (uint32_t)(&(CCM)->ROOT[34].TARGET_ROOT), /*!< Audio AHB Clock control name.*/
kCLOCK_RootAudioIpg = (uint32_t)(&(CCM)->ROOT[35].TARGET_ROOT), /*!< Audio IPG Clock control name.*/
kCLOCK_RootDramAlt = (uint32_t)(&(CCM)->ROOT[64].TARGET_ROOT), /*!< DRAM ALT Clock control name.*/

kCLOCK_RootSai1 = (uint32_t)(&(CCM)->ROOT[75].TARGET_ROOT), /*!< SAI1 Clock control name.*/
kCLOCK_RootSai2 = (uint32_t)(&(CCM)->ROOT[76].TARGET_ROOT), /*!< SAI2 Clock control name.*/
kCLOCK_RootSai3 = (uint32_t)(&(CCM)->ROOT[77].TARGET_ROOT), /*!< SAI3 Clock control name.*/
kCLOCK_RootSai4 = (uint32_t)(&(CCM)->ROOT[78].TARGET_ROOT), /*!< SAI4 Clock control name.*/
kCLOCK_RootSai5 = (uint32_t)(&(CCM)->ROOT[79].TARGET_ROOT), /*!< SAI5 Clock control name.*/
kCLOCK_RootSai6 = (uint32_t)(&(CCM)->ROOT[80].TARGET_ROOT), /*!< SAI6 Clock control name.*/

kCLOCK_RootQspi = (uint32_t)(&(CCM)->ROOT[87].TARGET_ROOT), /*!< QSPI Clock control name.*/

kCLOCK_RootI2c1 = (uint32_t)(&(CCM)->ROOT[90].TARGET_ROOT), /*!< I2C1 Clock control name.*/
kCLOCK_RootI2c2 = (uint32_t)(&(CCM)->ROOT[91].TARGET_ROOT), /*!< I2C2 Clock control name.*/
kCLOCK_RootI2c3 = (uint32_t)(&(CCM)->ROOT[92].TARGET_ROOT), /*!< I2C3 Clock control name.*/
kCLOCK_RootI2c4 = (uint32_t)(&(CCM)->ROOT[93].TARGET_ROOT), /*!< I2C4 Clock control name.*/

kCLOCK_RootUart1 = (uint32_t)(&(CCM)->ROOT[94].TARGET_ROOT), /*!< UART1 Clock control name.*/
kCLOCK_RootUart2 = (uint32_t)(&(CCM)->ROOT[95].TARGET_ROOT), /*!< UART2 Clock control name.*/
kCLOCK_RootUart3 = (uint32_t)(&(CCM)->ROOT[96].TARGET_ROOT), /*!< UART3 Clock control name.*/
kCLOCK_RootUart4 = (uint32_t)(&(CCM)->ROOT[97].TARGET_ROOT), /*!< UART4 Clock control name.*/

kCLOCK_RootEcspi1 = (uint32_t)(&(CCM)->ROOT[101].TARGET_ROOT), /*!< ECSPI1 Clock control name.*/
kCLOCK_RootEcspi2 = (uint32_t)(&(CCM)->ROOT[102].TARGET_ROOT), /*!< ECSPI2 Clock control name.*/
kCLOCK_RootEcspi3 = (uint32_t)(&(CCM)->ROOT[131].TARGET_ROOT), /*!< ECSPI3 Clock control name.*/

kCLOCK_RootPwm1 = (uint32_t)(&(CCM)->ROOT[103].TARGET_ROOT), /*!< PWM1 Clock control name.*/
kCLOCK_RootPwm2 = (uint32_t)(&(CCM)->ROOT[104].TARGET_ROOT), /*!< PWM2 Clock control name.*/
kCLOCK_RootPwm3 = (uint32_t)(&(CCM)->ROOT[105].TARGET_ROOT), /*!< PWM3 Clock control name.*/
kCLOCK_RootPwm4 = (uint32_t)(&(CCM)->ROOT[106].TARGET_ROOT), /*!< PWM4 Clock control name.*/

kCLOCK_RootGpt1 = (uint32_t)(&(CCM)->ROOT[107].TARGET_ROOT), /*!< GPT1 Clock control name.*/
kCLOCK_RootGpt2 = (uint32_t)(&(CCM)->ROOT[108].TARGET_ROOT), /*!< GPT2 Clock control name.*/
kCLOCK_RootGpt3 = (uint32_t)(&(CCM)->ROOT[109].TARGET_ROOT), /*!< GPT3 Clock control name.*/
kCLOCK_RootGpt4 = (uint32_t)(&(CCM)->ROOT[110].TARGET_ROOT), /*!< GPT4 Clock control name.*/
kCLOCK_RootGpt5 = (uint32_t)(&(CCM)->ROOT[111].TARGET_ROOT), /*!< GPT5 Clock control name.*/
kCLOCK_RootGpt6 = (uint32_t)(&(CCM)->ROOT[112].TARGET_ROOT), /*!< GPT6 Clock control name.*/

kCLOCK_RootWdog = (uint32_t)(&(CCM)->ROOT[114].TARGET_ROOT), /*!< WDOG Clock control name.*/

kCLOCK_RootPdm = (uint32_t)(&(CCM)->ROOT[132].TARGET_ROOT), /*!< PDM Clock control name.*/
#endif
} clock_root_control_t;

Best Regards,

T.Kashiwagi

[Ming]

Hi, we resolved the issue by using macro offsetof.

The original SDK header file uses "direct addressing", something like: 

kCLOCK_RootM4 = (uint32_t)(&(CCM)->ROOT[1].TARGET_ROOT), /*!< ARM Cortex-M4 Clock control name.*/

Try instead: 

kCLOCK_RootM4 = (uint32_t)CCM_BASE+offsetof(CCM_Type,ROOT[1].TARGET_ROOT), /*!< ARM Cortex-M4 Clock control name.*/

I wish NXP can update the header maybe with a cpp specific preprocessor directive. 

[diegoadrian]

Hello,

For the moment, we only have the SDKs available for the GCC ARM Embedded and the IAR tool.

I apologize if this can be an inconvenience for you.

Best regards,

Diego. 

[Ming]

Can you be more specific? What development suite integrates with GCC toolchain for M4F development? Does it support FreeRTOS and NXP lower level API generation (such as Component Inspector)? 

[diegoadrian]

Hello,

If you go to our SDK Builder web tool, you can download the SDKs. However, we only have for the ARM GNU compiler and the IAR compiler. We currently do not have any SDK for MCU expresso.

https://mcuxpresso.nxp.com/en/builder 

At the time you are generating the SDK, you can select to add FreeRTOS examples. Moreover, the only FreeRTOS example that we do have for the i.MX8Mmini is the Amazon FreeRTOS kernel. Hope this can solve your problem.

Best regards,

Diego.

[Ming]

Does the CPU specific SDK provide lower level hardware driver APIs like the Processor Expert utility does? 

[diegoadrian]

Hello,

The most similar that we have to the Processor expert tool is the PIN MUX tool for i.MX. The SDK is in some way, examples of how to use the peripherals of the M4 core. Hope this can help you.

Best regards,

Diego.