imx8 Mini quad lite: flexspi interface with fpga

[VISINE]

Hi everybody,

we are studying imx8 M Mini Quad Lite for a new implementation.

We want to use FlexSPI in memory mapped interface with a FPGA.

Our problem is that our FPGA could spend more time to response that the wait state of the imx8M.

Is there anyone that has solved this problem?

best regards

[igorpadykov]

Hi Elena

>Our problem is that our FPGA could spend more time to response that the wait state of the imx8M.

one can try to access fpga twice, it will give fpga opportunity to prepare valid data for second access.

Other alternative: during access on some address(for example 0800_0000) fpga prepares valid data for next address

(0800_0004), e.t.c.

Best regards
igor

[VISINE]

Hi @igorpadykov ,

thanks for your answer.

But how can we realize that the answer receveid by the micro is wrong or incompleted or some timeout has occurred in the micro? 

Does the micro go in exception?

Perhaps, Have you already implemented a similar solution?

Best regards,

Elena

[igorpadykov]

Hi Elena

>Have you already implemented a similar solution?

sorry NXP has not such reference design or ready software solutions, for additional

help may be recommended to proceed with   https://contact.nxp.com/new-prof-svcs-sw-tech

Best regards
igor