imx6q eim bus connect fpga, use mmap to write and read

[nx5216]

we map eim bus address using mmap, fpga.driver.c:

then we define an buffer to test in application program，fpga_app.c:

here only one write operation was performed，but signal Tap shows that multiple write operations have been performed.Why does this happen？

[Dhruvit]

Hi @nx5216,

I hope you are doing well.

I have a few queries to ask.

1)Have you made sure that this map_base is not accessed from some other location at the time of execution, because it could be possible that it is being written at a time?

2)Can you please check which mode of operation is being used, A burst mode is used for accessing external devices, which support synchronous write type of access (PSRAM protocol). In this mode, after address assertion, a burst of sequential data can be written to the external device. Access may be delayed according to WAIT_B signal assertion (signal from the memory device) before the first piece of data arrived at the external device.

Please share the observation.

Thanks & Regards.

[nx5216]

I am sure that the map_base is not accessed from some other location, and asynchronous write mode is been used

[Dhruvit]

Hi @nx5216,

I hope you are doing well.

Waiting for your response.

Thanks & Regards,
Dhruvit Vasavada