imx6q audmux and ssi mapping

[_angelo_]

Hi,

from the RM, as default (reset) ssi1 should be mapped to AUD6, ssi2 to AUD5, ssi3 to port 7.

Anyway, i.e. in sabrelite, mainline, i see ssi1 working on AUD4 pads, but i don't see any specific AUDMUX devicetree config to setup this redirection. Is it spmething driver sets up as defaults ?

And, how to know where ssi2 is actuall mapped ?

Thanks

[art]

You are right in that, by default, SSI1 is assigned to AUD6 port through the
AUDMUX module and then the default settings are re-configured in software.

Best Regards,
Artur

[_angelo_]

found, in the sound {} node there is 

mux-int-port = <1>;
mux-ext-port = <4>;

This clarify. Thanks.

[_angelo_]

I finally could have i2s microphone working on AUD5

Leaving here important settings to have ssi2 working on AUD5, if anyone may need it

/ {
	model = "Freescale i.MX6 Quad SABRE Lite Board";
	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";

	cmm4030d: cmm4030d {
		#sound-dai-cells = <0>;
                compatible = "cui,cmm-4030d-261";
        };

	sound_mic {
		compatible = "simple-audio-card";
		simple-audio-card,name = "i2s mem mic";
		simple-audio-card,format = "i2s";
		simple-audio-card,bitclock-master = <&sound_master>;
		simple-audio-card,frame-master = <&sound_master>;
		sound_master: simple-audio-card,cpu {
			sound-dai = <&ssi2>;
			system-clock-frequency = <2822400>;
		};
		simple-audio-card,codec {
			sound-dai = <&cmm4030d>;
		};
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";

	ssi2 {
		fsl,audmux-port = <1>;
		fsl,port-config = <
			0x00000000
			IMX_AUDMUX_V2_PDCR_RXDSEL(4)
		>;
	};

	port5 {
		fsl,audmux-port = <4>;
		fsl,port-config = <
			 (IMX_AUDMUX_V2_PTCR_TFSDIR |
			 IMX_AUDMUX_V2_PTCR_TFSEL(1) |
			 IMX_AUDMUX_V2_PTCR_TCLKDIR |
			 IMX_AUDMUX_V2_PTCR_TCSEL(1))
			 IMX_AUDMUX_V2_PDCR_RXDSEL(1)
		>;
	};
};

&ssi2 {
	fsl,mode = "i2s-master";
	assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
			  <&clks IMX6QDL_CLK_PLL4>,
			  <&clks IMX6QDL_CLK_SSI2>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
	assigned-clock-rates = <0>, <663552000>, <18432000>;
	status = "okay";
};

[art]

Thank you for sharing your insights.

Best Regards,

Artur