In all my recent posts on this forum I am struggling getting our second flash on our board working properly.
Currently the biggest not understood area is the flexspi clock. As we understand the documentation and the clarifications / confirmations we receive on this forum, we can use flash connected to port A1 and port B1 without DQS, if we follow these rules:
- do not configure DQS in system_MIMXRT1024.c (SystemInit function)
- overwrite FCB with sample clock source set to internally
- overwrite FCB with configured flash speed is 60 MHz
- set the FlexSPI clock to exactly 60 MHz or less
When I follow all these steps, it simple does not work.
I adapted the nor_polling SDK example and attached it to this project.
The clock source for the flexspi clock is set in the app.h as follows:
CLOCK_InitSysPfd(kCLOCK_Pfd3, 24); /* Set PLL3 clock 480MHZ. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 0x1); /* Choose PLL3 clock as flexspi source clock. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 8); /* flexspi clock 60 MHz. */
As the comments explain, instead of Pdf2 I select Pdf3, and set it to 480 MHz. The set the divider to 8 which gives exactly 60 MHz according to the clock tool in MCUxpresso.
When I run this example, I get a hardfault directly after leaving the calls running in ITC memory. When I set the divider to e.g. 6 (which would give a flexspi clock running at 80 MHz), then everything works fine.
We need to understand why. What are we still doing wrong, or are we still misunderstanding something crucial? Why won't the SDK example work with a flexspi clock running at 60 MHz?
