iMx6Solo SPI interface: No data read on MISO

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iMx6Solo SPI interface: No data read on MISO

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hardyb
Contributor III

Hello,

I have setup SPI in Linux with an iMx6Solo Wandboard on a custom carrier board. I am trying to establish communication with a peripheral. However, I never see any data come back from the MISO line.

MOSI line, clock and chip select all have good transitions and I have scoped the data coming back on MISO to confirm it's being sent. On the iMx6 [master], the IRQ goes off but I only ever get a blank buffer reported. I have used the user-space tools spi-pipe & spi-config as well as the Ruby SPIDev gem. Same result with both.

I am inclined to believe this might be an issue with either spi_imx, spidev or both. Perhaps one reads the data and clears the buffer before the other can retrieve the data for my application? Or there's a hand-off that's mistimed/failing?

I am using the SPI1 interface. I am confident my DTS entries and pin assignments are correct.

System, drivers and software courtesy of the Freescale BSP on Yocto, Krogoth branch.

Any questions or insight appreciated. Thanks.

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1,106 次查看
hardyb
Contributor III

This issue was the result of a bad connector on our carrier board. We were not able to source an EDM connector and used a different adapter that was deeper than the EDM specification. This caused the processor module board to have half of its pins unconnected to the carrier. Only a few connections went through that side of the adapter so it took us a while to diagnose.

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1,107 次查看
hardyb
Contributor III

This issue was the result of a bad connector on our carrier board. We were not able to source an EDM connector and used a different adapter that was deeper than the EDM specification. This caused the processor module board to have half of its pins unconnected to the carrier. Only a few connections went through that side of the adapter so it took us a while to diagnose.

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igorpadykov
NXP Employee
NXP Employee

Hi Hardy

MISO data should be provided by external device, so one can check

if it was configured properly. Also one can test with loopback test.

Best regards
igor
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1,106 次查看
hardyb
Contributor III

MOSI, MISO, clock and chip select have all been confirmed via logic analyzer.

The slave device is an FPGA and is currently programmed to respond to any data on the MOSI line. I see the responses through a logic analyzer on the MISO line, but the buffer comes back 0 through Ruby SPIDev and spi-pipe.

I have not tried the loopback test. That is a good idea, I will attempt to set that up tomorrow.

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