iMX8MQ MIPI DSI pixel clock changed when bootup

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iMX8MQ MIPI DSI pixel clock changed when bootup

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LinhNguyen
Contributor III

Hi everybody,

I'm making driver for a JDI 5" FHD display for TechNexion PICO IMX8MQ board. I use rm67191 as a reference (linux/panel-raydium-rm67191.c at tn-imx_4.14.98_2.0.0_ga-wip · TechNexion/linux · GitHub  and linux/fsl-imx8mq-evk-dcss-rm67191.dtsi at tn-imx_4.14.98_2.0.0_ga-wip · TechNexion/linux · GitHub  ) and linux-4.14.98.

Now the system can boot, but LCD doesn't work well. From the boot log (attached), I saw this line

[    1.319654] dcss-core 32e00000.dcss: Pixel clock set to 120000 kHz instead of 132000 kHz, difference is -12000000 Hz

It looks like the dcss automatically reduces the clock from 132MHz to 120MHz for some reasons.

I have tried to use 148.5MHz for pixel clock (change in device tree) and this time dcss reduces the clock to 135MHz.

I have tried with kernel version 4.14.78, but the problem still remains.

Is this an issue? And any suggestion about how to correct LCD timing? Thank you.

lcd_flick.jpg

1 Solution
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igorpadykov
NXP Employee
NXP Employee

Hi Linh

could you try linux from nxp source.codeaurora.org/external/imx/linux-imx repository

linux-imx - i.MX Linux kernel 

Linux 4.19.35_1.1.0 Documentation

Best regards
igor

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LinhNguyen
Contributor III

Hi igorpadykov,

Thank you for your reply.

I know the valid clocks list, and what I used is in the valid list (132MHz, 148.5MHz). But the actual clock isn't as set, it automatically changed to lower clock in the valid list (set 148.5, it changes to 135MHz; set 132MHz, it changes to 120MHz).

Regarding the thread you sent, do you mean using the kernel from kopera (GitHub - kopera/linux-imx )?

Thank you for your time.

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igorpadykov
NXP Employee
NXP Employee

Hi Linh

could you try linux from nxp source.codeaurora.org/external/imx/linux-imx repository

linux-imx - i.MX Linux kernel 

Linux 4.19.35_1.1.0 Documentation

Best regards
igor

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LinhNguyen
Contributor III

Hi igorpadykov‌,

Thank you for your suggestion.

I have tried to build Yocto for kernel 4.19.35 & adding the panel driver + dts. The kernel can boot until SD driver. I think it not compatible with TechNexion.

But at least, it passed the panel initialization and the clock changing didn't occur.

So, the good news is Yocto warrior kernel (4.19.35) solved the DCSS clock changing issue, and the bad news is TechNexion latest kernel is 4.14.98. Do you have any suggestion for me to bring the fix to TechNexion kernel? Thank you.

The boot log as below.

[ 0.850895] pwm-backlight backlight_mipi: Linked as a consumer to regulator.3 
[ 0.862437] imx-sdma 30bd0000.sdma: no iram assigned, using external mem 
[ 0.868642] imx-sdma 30bd0000.sdma: Falling back to syfs fallback for: imx/sdma/sdma-imx7d.bin 
[ 0.873228] imx-sdma 302c0000.sdma: no iram assigned, using external mem 
[ 0.888336] mxs-dma 33000000.dma-apbh: initialized 
[ 0.892262] Bus freq driver module loaded 
[ 0.894363] Config NOC for VPU and CPU 
[ 0.907675] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled 
[ 0.914273] SuperH (H)SCI(F) driver initialized 
[ 0.916852] 30860000.serial: ttymxc0 at MMIO 0x30860000 (irq = 44, base_baud = 1562500) is a IMX 
[ 0.927679] console [ttymxc0] enabled 
[ 0.927679] console [ttymxc0] enabled 
[ 0.932184] bootconsole [ec_imx6q0] disabled 
[ 0.932184] bootconsole [ec_imx6q0] disabled 
[ 0.941457] 30890000.serial: ttymxc1 at MMIO 0x30890000 (irq = 45, base_baud = 5000000) is a IMX 
[ 0.952978] 30a60000.serial: ttymxc3 at MMIO 0x30a60000 (irq = 46, base_baud = 5000000) is a IMX 
[ 0.962797] msm_serial: driver initialized 
[ 0.980740] imx-dcss-crtc imx-dcss-crtc.0: DMA mask not set 
[ 0.986641] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). 
[ 0.993283] [drm] No driver support for vblank timestamp query. 
[ 0.999369] imx-drm display-subsystem: bound imx-dcss-crtc.0 (ops dcss_crtc_ops) 
[ 1.006852] nwl_dsi-imx mipi_dsi@30A00000: Using DCSS as input source 
[ 1.013614] LINH jdi jdi_panel_probe(): DBG tpreset gpio ok 
[ 1.019233] LINH jdi jdi_panel_probe(): DBG reset gpio ok 
[ 1.024666] nwl-mipi-dsi 30a00000.mipi_dsi_bridge: [drm:nwl_dsi_host_attach] lanes=4, format=0x0 flags=0x411 
[ 1.034608] imx-drm display-subsystem: bound mipi_dsi@30A00000 (ops imx_nwl_dsi_component_ops) 
[ 1.622889] LINH jdi jdi_panel_prepare(): DBG prepared 0 
[ 1.622894] LINH jdi jdi_panel_prepare(): DBG reset Panel 
[ 1.733723] LINH jdi jdi_panel_prepare(): DBG reset Touch 
[ 1.808767] LINH jdi jdi_panel_enable(): DBG enabled 0, prepared 1 
[ 1.814216] LINH jdi jdi_panel_enable(): DBG clever init 1080p done 
[ 1.854347] LINH jdi jdi_panel_enable(): DBG display on 0 done 
[ 1.973540] LINH jdi jdi_panel_enable(): DBG display on 1 done
[ 1.973604] LINH jdi jdi_panel_enable(): DBG cabc ui on done
[ 2.061864] Console: switching to colour frame buffer device 135x120
[ 2.163201] imx-drm display-subsystem: fb0: DRM emulated frame buffer device
[ 2.170636] [drm] Initialized imx-drm 1.0.0 20120507 for display-subsystem on minor 0
[ 2.186864] loop: module loaded
[ 2.194456] slram: not enough parameters.
[ 2.202351] libphy: Fixed MDIO Bus: probed
[ 2.207126] NXP PHY: loading NXP PHY driver: [autonomous mode]
[ 2.213191] tun: Universal TUN/TAP device driver, 1.6
[ 2.218466] CAN device driver interface
[ 2.224726] fec 30be0000.ethernet: 30be0000.ethernet supply phy not found, using dummy regulator
[ 2.233588] fec 30be0000.ethernet: Linked as a consumer to regulator.0
[ 2.240484] pps pps0: new PPS source ptp0
[ 2.250124] libphy: fec_enet_mii_bus: probed
[ 2.255569] fec 30be0000.ethernet eth0: registered PHC device 0
[ 2.256489] random: fast init done
[ 2.262376] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
[ 2.270768] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
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sotero
Contributor III

Hello Linh,

I had the same problem the first time I tried kernel 4.19.35. It stopped at the same point. After some tests I've found that you need a new  ATF firmware version for the kernel 4.19.35 to work. There were some changes about CPU sleep management in the kernel that needs an updated version of ATF.

Meanwhile you can try to boot with the kernel boot option cpuidle.off=1 but take care that this will increase the power usage. It's better to update ATF. You can use the same u-boot if you want (TechNexion).

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LinhNguyen
Contributor III

Hi sotero‌,

Thank you for your suggestion.

I observed that imx-atf version 2.0 was built (imx-atf_2.0.bb\imx-atf\recipes-bsp\meta-bsp\imx - meta-fsl-bsp-release - i.MX Yocto Project Release ... ).
I use yocto branch warrior_4.19.35 from codeaurora --> I think new ATF was included.

It stop booting maybe because of TechNexion customize things (eMMC, or somewhere else) isn't compatible with iMX8mq evk.

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sotero
Contributor III

Hello Linh.

Maybe you don't know how ATF works. It's not included in the root filesystem or the kernel. It's in the binary file you make with the imx-mkimage tools using also u-boot, ddr firmware, hdmi firmware and ATF (bl31.bin). If you're using u-boot from Technexion then if you did not change anything it's sure that you are using ATF 2.0-imx_4.14.98_2.0.0_ga. Take a look at install_uboot_imx8.sh in Technexion u-boot sources (u-boot-edm/install_uboot_imx8.sh at tn-imx_v2018.03_4.14.98_2.0.0_ga-wip · TechNexion/u-boot-edm · G... ).

Also I know Technexion u-boot can work with this kernel because I have this same combination but with the new ATF. Give it a try at kernel boot option cpuidle.off=1 and you'll see if this is really the problem.

Best regards,

Santiago Otero

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LinhNguyen
Contributor III

Hi Santiago,

Thank you. You are correct. After add "cpuidle.off=1" into bootargs, it can boot into login prompt. I din't aware that the TechNexion u-boot isn't overwritten by the new u-boot. So, I will update.

Beside ATF, is there any conflicts that I have to fix to use 4.19.35 kernel on TechNexion board? In my mind, the device tree modification is needed.

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sotero
Contributor III

Hello Linh.

I don't know about any conflicts in Technexion board. I'm using TechNexion u-boot but our board is not a TechNexion board. It's a custom board. So I can't help you about that.

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igorpadykov
NXP Employee
NXP Employee

Hi Linh

there are some clock limitations in mipi-dsi driver defined by "static int valid_clocks[]" in:

nwl-dsi.c\bridge\drm\gpu\drivers - linux-imx - i.MX Linux kernel 

for setting necessary clock one can try workarounds suggested on

https://community.nxp.com/thread/513899 

Best regards
igor
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