iMX8MP warm reboot

[sschefter]

Hi.

We have a custom board with an iMX8MP processor.  Sometimes when doing a warm reset the board fails to boot.  This can either be a reset at the PMIC or using the Linux reboot command (watchdog reset).

When it fails to boot, u-boot SPL (inside imx-boot) reports:

Trying to boot from BOOTROM
Boot Stage: Recovery boot
image offset 0x8000, pagesize 0x200, ivt offset 0x0
spl_romapi_raw_seekable_read Failure when load 0x63000, size 0xc3800
SPL: failed to boot from all boot devices

Note "Boot Stage: Recovery boot".  For a normal/working boot it says "Primary boot"

Because the message is printed by u-boot SPL, the ROM has already successfully loaded the imx-boot image from the primary boot device (SD).  Looking at the code (arch/arm/mach-imx/spl_imx_romapi.c), it is attempting to ask the ROM to load the next stage and the ROM is not returning "success".  I have verified that the boot device, offset and size are the same in the working and non-working cases.

Also, with additional debugging, I can see that one read requests made to the ROM works before the one that fails:
spl_romapi_raw_seekable_read 0x60000, size 0x3000
spl_romapi_raw_seekable_read ROM returned f0
spl_romapi_raw_seekable_read 0x63000, size 0xc3800
spl_romapi_raw_seekable_read ROM returned 2

What is recovery boot and what causes the device to do enter that stage?

Where can I find information on the ROM interface being used by the u-boot code?

Thanks,
    Steve

[sschefter]

Hi Rita.

This is a custom board with an iMX8MP processor.  Specifically, it is the Variscite iMX8MP SoM on a custom carrier board.

The BSP is from Variscite and based on the NXP kirkstone 5.15.52-2.1.0 release.

Note that my questions are regarding the ROM interface to the iMX8MP, so not specific to a particular BSP.  I'm looking for information on the ROM interface generally, but most importantly what causes the ROM to report that it is performing a Recovery boot and how that differs from the Primary boot stage.

    Steve

[Rita_Wang]

What is the boot mode setting in your board? We do not met the problem in our side.

[sschefter]

Hi Rita.

The boot mode is USDHC2 to an SD card.  It doesn't seem to happen with a USDHC3 to eMMC.

    Steve

[Rita_Wang]

Just happen on the SD card boot situation? For the emmc it can work well?

If yes, I will try the some BSP on our reference board and tell you the result.

[sschefter]

Hi Rita.

Any update on this?

Note that while a solution to the reboot problem would be great, my posting is really about getting details on the ROM interface and the boot stages.  Do you have any information on that?

Thanks,
    Steve

[sschefter]

Yes, that's correct.

[Rita_Wang]

Which version BSP are you using? Are you using the NXP reference board or the board you designed yourself?