Is it possible to use both channel A/B on my LPDDR4 with iMX8MNano, ie:
DRAM_CS0#,DRAM_CKE0# plugged on the channel(A) ball H4,J4
DRAM_CS1#,DRAM_CKE1# plugged on the channel(B) ball R4,P4
and tie together control bus(CA0-5,CK) and DATA Bus (DQ0-15)?
I want to use all my memory present in the LPDDR4 chip. I need this information before I start the my memory routing.
Thanks.
CD