iMX7D : Which pad is the LCD_RS signal ?

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iMX7D : Which pad is the LCD_RS signal ?

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koichisakagami
Contributor II

Dear community,
We have been developing our product with iMX7D.

I hope to use LCD_RS signal.

I am checking the Reference Manual IMX7DRM ,8.1.1.1 Muxing Options
the LCD_RS signal is assigned as follows.

    Port : LCD_RS
       Pad : ECSPI2_SS0
       Mode : ALT4

       Pad : LCD1_RESET
       Mode : ALT0

However ,for the SW_MUX_CTL_PAD_ECSPI2_SS0 SW MUX Control Register
ALT4 mode is  assigned as ALT4_LCD_RESET.


In the same way,for the SW_MUX_CTL_PAD_LCD_RESET SW MUX Control Register
ALT0 mode is assigned as ALT0_LCD_RESET.

[Question]
       Which pad is assigned as LCD_RS signal ?

Best Regards,
Koichi Sakagami

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557 次查看
art
NXP Employee
NXP Employee

Actually, here LCD_RS and LCD_RESET are just two names for the same signal that has two pin multiplexing options: ALT0 on the LCD1_RESET pad and ALT4 on the ECSPI2_SS0 pad, as the Reference Manual document specifies.


Have a great day,
Artur

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558 次查看
art
NXP Employee
NXP Employee

Actually, here LCD_RS and LCD_RESET are just two names for the same signal that has two pin multiplexing options: ALT0 on the LCD1_RESET pad and ALT4 on the ECSPI2_SS0 pad, as the Reference Manual document specifies.


Have a great day,
Artur

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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larsthestrup
Contributor III

Hi Artur   

I have the same problem, where is LCD_RS, you say it is two names for the same signal, but is it reset or Register Select (RS)?
I am trying to connect a display from Ortus Technology to IMX7D

There are following control signals

On display         On IMX7D

RESET              LCD_RESET

CS                     LCD_CS

RS                     ?????

WR                    LCD_WR_RWn (8080 mode)

RD                     LCD_RD_E       (8080 mode)

Where to connect the RS signal ?

Regards

Lars Thestrup

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art
NXP Employee
NXP Employee

Actually, this is just a kind of general-purpose output signal, whose state is controlled by the LCDIFx_CTRL1n[RESET] bit. So, for MPU-type interface it can be used as Register Select, or, for example, as Reset for generic synchronous interface.

Best Regrards,

Artur

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