Hi Wang
no, available memory configurations provided in
sect.2.3 DDR mapping to MMDC controller ports IMX6DQRM
Best regards
igor
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but i view Table 6-1. MMDC feature summary , it notice
Up to 4 Gbyte address space and configurable address space per CS
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how can I understand ?
now we use 4GB ddr3 , just connect CS0 . through u-boot can recognition 。 but it will be hang when run into kernal uimage.