Hi All,
On my target board after PoR the iMX53x DDR2 interface is not working.
The transfer of OS image on NOR to DDR2 is having an issue.
The CKE after PoR is always low whereas NOR bus activity shows up for few seconds and then halts.
System never boots. I am suspecting the iMX boot ROM code which initializes the DDR/NOR interface for OS transfer.
The board is production grade and was working fine before as intended.
Please share your views on how to confirm the issue.
Hi Tayyab
if this just one board and you nothing changed, then
this may be bad contact issue (probably due to inaccurate board
handling - bending or drop): one can resolder processor.
Additionally one can check 32.768KHz and 24 MHz clocks and all
power supplies.
Next step may be run OBDS (it can be run with jtag).
It has weimnor example
On-Board Diagnostic Suit for the i.MX53 Quick Start Board
i.MX53 System Development User’s Guide (rev.1, 3/2011)
also describes main points for check
<http://www.freescale.com/files/32bit/doc/user_guide/MX53UG.pdf
Tool for memory test
DDR_STRESS_TESTER_FOR_MX51_MX53 : DDR Stress tester kit for the i.MX51 and i.MX53.
Best regards
chip
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